Index: Makefile
===================================================================
--- Makefile (revision 145)
+++ Makefile (revision 146)
@@ -12,10 +12,14 @@
tarballs = $(addsuffix .tar.bz2, $(addprefix u-boot-, $(versions)))
sha1s = $(addsuffix .sha1sum, $(tarballs))
+patches = $(CURDIR)/patches/u-boot-2022.10-repka-pi3.patch
-BUILD_TARGETS = $(tarballs) $(sha1s)
+.NOTPARALLEL: $(patches)
+BUILD_TARGETS = $(tarballs) $(sha1s) $(patches)
+
+
include ../../../build-system/core.mk
@@ -41,5 +45,10 @@
fi ; \
done
+$(patches): $(sha1s)
+ @echo -e "\n======= Create Patches =======\n" ; \
+ ( cd create-2022.10-repka-pi3-patch ; ./create.patch.sh ) ; \
+ echo -e "\n"
+
download_clean:
- @rm -f $(tarballs) $(sha1s)
+ @rm -f $(tarballs) $(sha1s) $(patches)
Index: create-2022.10-repka-pi3-patch/create.patch.sh
===================================================================
--- create-2022.10-repka-pi3-patch/create.patch.sh (nonexistent)
+++ create-2022.10-repka-pi3-patch/create.patch.sh (revision 146)
@@ -0,0 +1,15 @@
+#!/bin/sh
+
+VERSION=2022.10
+
+tar --files-from=file.list -xjvf ../u-boot-$VERSION.tar.bz2
+mv u-boot-$VERSION u-boot-$VERSION-orig
+
+cp -rf ./u-boot-$VERSION-new ./u-boot-$VERSION
+
+diff --unified -Nr u-boot-$VERSION-orig u-boot-$VERSION > u-boot-$VERSION-repka-pi3.patch
+
+mv u-boot-$VERSION-repka-pi3.patch ../patches
+
+rm -rf ./u-boot-$VERSION
+rm -rf ./u-boot-$VERSION-orig
Property changes on: create-2022.10-repka-pi3-patch/create.patch.sh
___________________________________________________________________
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: create-2022.10-repka-pi3-patch/file.list
===================================================================
--- create-2022.10-repka-pi3-patch/file.list (nonexistent)
+++ create-2022.10-repka-pi3-patch/file.list (revision 146)
@@ -0,0 +1,4 @@
+u-boot-2022.10/arch/arm/dts/Makefile
+u-boot-2022.10/arch/arm/dts/sun50i-h5-cpu-opp.dtsi
+u-boot-2022.10/arch/arm/dts/sun50i-h5.dtsi
+u-boot-2022.10/drivers/power/Kconfig
Index: create-2022.10-repka-pi3-patch/u-boot-2022.10-new/arch/arm/dts/Makefile
===================================================================
--- create-2022.10-repka-pi3-patch/u-boot-2022.10-new/arch/arm/dts/Makefile (nonexistent)
+++ create-2022.10-repka-pi3-patch/u-boot-2022.10-new/arch/arm/dts/Makefile (revision 146)
@@ -0,0 +1,1327 @@
+# SPDX-License-Identifier: GPL-2.0+
+
+dtb-$(CONFIG_TARGET_SMARTWEB) += at91sam9260-smartweb.dtb
+dtb-$(CONFIG_TARGET_TAURUS) += at91sam9g20-taurus.dtb
+dtb-$(CONFIG_TARGET_CORVUS) += at91sam9g45-corvus.dtb
+dtb-$(CONFIG_TARGET_GURNARD) += at91sam9g45-gurnard.dtb
+
+dtb-$(CONFIG_TARGET_SMDKC100) += s5pc1xx-smdkc100.dtb
+dtb-$(CONFIG_TARGET_S5P_GONI) += s5pc1xx-goni.dtb
+dtb-$(CONFIG_ARCH_EXYNOS4) += exynos4210-origen.dtb \
+ exynos4210-smdkv310.dtb \
+ exynos4210-universal_c210.dtb \
+ exynos4210-trats.dtb \
+ exynos4412-trats2.dtb \
+ exynos4412-odroid.dtb
+
+dtb-$(CONFIG_TARGET_HIKEY) += hi6220-hikey.dtb
+dtb-$(CONFIG_TARGET_HIKEY960) += hi3660-hikey960.dtb
+
+dtb-$(CONFIG_TARGET_POPLAR) += hi3798cv200-poplar.dtb
+
+dtb-$(CONFIG_ARCH_EXYNOS5) += exynos5250-arndale.dtb \
+ exynos5250-snow.dtb \
+ exynos5250-spring.dtb \
+ exynos5250-smdk5250.dtb \
+ exynos5420-smdk5420.dtb \
+ exynos5420-peach-pit.dtb \
+ exynos5800-peach-pi.dtb \
+ exynos5422-odroidxu3.dtb
+dtb-$(CONFIG_EXYNOS7420) += exynos7420-espresso7420.dtb
+dtb-$(CONFIG_TARGET_A5Y17LTE) += exynos78x0-axy17lte.dtb
+dtb-$(CONFIG_TARGET_A3Y17LTE) += exynos78x0-axy17lte.dtb
+dtb-$(CONFIG_TARGET_A7Y17LTE) += exynos78x0-axy17lte.dtb
+
+dtb-$(CONFIG_ARCH_APPLE) += \
+ t8103-j274.dtb \
+ t8103-j293.dtb \
+ t8103-j313.dtb \
+ t8103-j456.dtb \
+ t8103-j457.dtb
+
+dtb-$(CONFIG_ARCH_DAVINCI) += \
+ da850-evm.dtb \
+ da850-lcdk.dtb \
+ da850-lego-ev3.dtb
+
+dtb-$(CONFIG_ARCH_KIRKWOOD) += \
+ kirkwood-atl-sbx81lifkw.dtb \
+ kirkwood-atl-sbx81lifxcat.dtb \
+ kirkwood-blackarmor-nas220.dtb \
+ kirkwood-d2net.dtb \
+ kirkwood-dns325.dtb \
+ kirkwood-dockstar.dtb \
+ kirkwood-dreamplug.dtb \
+ kirkwood-ds109.dtb \
+ kirkwood-goflexnet.dtb \
+ kirkwood-guruplug-server-plus.dtb \
+ kirkwood-ib62x0.dtb \
+ kirkwood-iconnect.dtb \
+ kirkwood-is2.dtb \
+ kirkwood-km_kirkwood.dtb \
+ kirkwood-lsxhl.dtb \
+ kirkwood-lschlv2.dtb \
+ kirkwood-net2big.dtb \
+ kirkwood-ns2.dtb \
+ kirkwood-ns2lite.dtb \
+ kirkwood-ns2max.dtb \
+ kirkwood-ns2mini.dtb \
+ kirkwood-nsa310s.dtb \
+ kirkwood-openrd-base.dtb \
+ kirkwood-openrd-client.dtb \
+ kirkwood-openrd-ultimate.dtb \
+ kirkwood-pogo_e02.dtb \
+ kirkwood-pogoplug-series-4.dtb \
+ kirkwood-sheevaplug.dtb
+
+dtb-$(CONFIG_MACH_S900) += \
+ bubblegum_96.dtb
+dtb-$(CONFIG_MACH_S700) += \
+ s700-cubieboard7.dtb
+
+dtb-$(CONFIG_ROCKCHIP_PX30) += \
+ px30-evb.dtb \
+ px30-firefly.dtb \
+ px30-engicam-px30-core-ctouch2.dtb \
+ px30-engicam-px30-core-ctouch2-of10.dtb \
+ px30-engicam-px30-core-edimm2.2.dtb \
+ rk3326-odroid-go2.dtb
+
+dtb-$(CONFIG_ROCKCHIP_RK3036) += \
+ rk3036-sdk.dtb
+
+dtb-$(CONFIG_ROCKCHIP_RK3066) += \
+ rk3066a-mk808.dtb
+
+dtb-$(CONFIG_ROCKCHIP_RK3128) += \
+ rk3128-evb.dtb
+
+dtb-$(CONFIG_ROCKCHIP_RK3188) += \
+ rk3188-radxarock.dtb
+
+dtb-$(CONFIG_ROCKCHIP_RK322X) += \
+ rk3229-evb.dtb
+
+dtb-$(CONFIG_ROCKCHIP_RK3288) += \
+ rk3288-evb.dtb \
+ rk3288-firefly.dtb \
+ rk3288-miqi.dtb \
+ rk3288-phycore-rdk.dtb \
+ rk3288-popmetal.dtb \
+ rk3288-rock2-square.dtb \
+ rk3288-rock-pi-n8.dtb \
+ rk3288-tinker.dtb \
+ rk3288-tinker-s.dtb \
+ rk3288-veyron-jerry.dtb \
+ rk3288-veyron-mickey.dtb \
+ rk3288-veyron-minnie.dtb \
+ rk3288-veyron-speedy.dtb \
+ rk3288-vyasa.dtb
+
+dtb-$(CONFIG_ROCKCHIP_RK3308) += \
+ rk3308-evb.dtb \
+ rk3308-roc-cc.dtb
+
+dtb-$(CONFIG_ROCKCHIP_RK3328) += \
+ rk3328-evb.dtb \
+ rk3328-nanopi-r2s.dtb \
+ rk3328-roc-cc.dtb \
+ rk3328-rock64.dtb \
+ rk3328-rock-pi-e.dtb
+
+dtb-$(CONFIG_ROCKCHIP_RK3368) += \
+ rk3368-lion-haikou.dtb \
+ rk3368-sheep.dtb \
+ rk3368-geekbox.dtb \
+ rk3368-px5-evb.dtb \
+
+dtb-$(CONFIG_ROCKCHIP_RK3399) += \
+ rk3399-evb.dtb \
+ rk3399-ficus.dtb \
+ rk3399-firefly.dtb \
+ rk3399-gru-bob.dtb \
+ rk3399-gru-kevin.dtb \
+ rk3399-khadas-edge.dtb \
+ rk3399-khadas-edge-captain.dtb \
+ rk3399-khadas-edge-v.dtb \
+ rk3399-leez-p710.dtb \
+ rk3399-nanopc-t4.dtb \
+ rk3399-nanopi-m4.dtb \
+ rk3399-nanopi-m4-2gb.dtb \
+ rk3399-nanopi-m4b.dtb \
+ rk3399-nanopi-neo4.dtb \
+ rk3399-nanopi-r4s.dtb \
+ rk3399-orangepi.dtb \
+ rk3399-pinebook-pro.dtb \
+ rk3399-puma-haikou.dtb \
+ rk3399-roc-pc.dtb \
+ rk3399-roc-pc-mezzanine.dtb \
+ rk3399-rock-pi-4a.dtb \
+ rk3399-rock-pi-4b.dtb \
+ rk3399-rock-pi-4c.dtb \
+ rk3399-rock960.dtb \
+ rk3399-rockpro64.dtb \
+ rk3399pro-rock-pi-n10.dtb
+
+dtb-$(CONFIG_ROCKCHIP_RK3568) += \
+ rk3568-evb.dtb
+
+dtb-$(CONFIG_ROCKCHIP_RV1108) += \
+ rv1108-elgin-r1.dtb \
+ rv1108-evb.dtb
+
+dtb-$(CONFIG_ARCH_S5P4418) += \
+ s5p4418-nanopi2.dtb
+
+dtb-$(CONFIG_ARCH_MESON) += \
+ meson-axg-s400.dtb \
+ meson-axg-jethome-jethub-j100.dtb \
+ meson-gxbb-nanopi-k2.dtb \
+ meson-gxbb-odroidc2.dtb \
+ meson-gxbb-nanopi-k2.dtb \
+ meson-gxbb-p200.dtb \
+ meson-gxbb-p201.dtb \
+ meson-gxl-s805x-libretech-ac.dtb \
+ meson-gxl-s905d-libretech-pc.dtb \
+ meson-gxl-s905w-jethome-jethub-j80.dtb \
+ meson-gxl-s905x-khadas-vim.dtb \
+ meson-gxl-s905x-libretech-cc.dtb \
+ meson-gxl-s905x-libretech-cc-v2.dtb \
+ meson-gxl-s905x-p212.dtb \
+ meson-gxm-khadas-vim2.dtb \
+ meson-gxm-s912-libretech-pc.dtb \
+ meson-gxm-wetek-core2.dtb \
+ meson-g12a-radxa-zero.dtb \
+ meson-g12a-sei510.dtb \
+ meson-g12a-u200.dtb \
+ meson-g12b-a311d-khadas-vim3.dtb \
+ meson-g12b-gtking.dtb \
+ meson-g12b-gtking-pro.dtb \
+ meson-g12b-gsking-x.dtb \
+ meson-g12b-odroid-n2.dtb \
+ meson-g12b-odroid-n2-plus.dtb \
+ meson-sm1-bananapi-m5.dtb \
+ meson-sm1-khadas-vim3l.dtb \
+ meson-sm1-odroid-c4.dtb \
+ meson-sm1-odroid-hc4.dtb \
+ meson-sm1-sei610.dtb
+dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \
+ tegra20-medcom-wide.dtb \
+ tegra20-paz00.dtb \
+ tegra20-plutux.dtb \
+ tegra20-seaboard.dtb \
+ tegra20-tec.dtb \
+ tegra20-trimslice.dtb \
+ tegra20-ventana.dtb \
+ tegra20-colibri.dtb \
+ tegra30-apalis.dtb \
+ tegra30-beaver.dtb \
+ tegra30-cardhu.dtb \
+ tegra30-colibri.dtb \
+ tegra30-tec-ng.dtb \
+ tegra114-dalmore.dtb \
+ tegra124-apalis.dtb \
+ tegra124-jetson-tk1.dtb \
+ tegra124-nyan-big.dtb \
+ tegra124-cei-tk1-som.dtb \
+ tegra124-venice2.dtb \
+ tegra186-p2771-0000-000.dtb \
+ tegra186-p2771-0000-500.dtb \
+ tegra210-p2371-0000.dtb \
+ tegra210-p2371-2180.dtb \
+ tegra210-p2571.dtb \
+ tegra210-p3450-0000.dtb
+
+ifdef CONFIG_ARMADA_32BIT
+dtb-$(CONFIG_ARCH_MVEBU) += \
+ armada-375-db.dtb \
+ armada-385-atl-x530.dtb \
+ armada-385-atl-x530DP.dtb \
+ armada-385-db-88f6820-amc.dtb \
+ armada-385-turris-omnia.dtb \
+ armada-388-clearfog.dtb \
+ armada-388-gp.dtb \
+ armada-388-helios4.dtb \
+ armada-38x-controlcenterdc.dtb \
+ armada-xp-crs305-1g-4s.dtb \
+ armada-xp-crs305-1g-4s-bit.dtb \
+ armada-xp-crs326-24g-2s.dtb \
+ armada-xp-crs326-24g-2s-bit.dtb \
+ armada-xp-crs328-4c-20s-4s.dtb \
+ armada-xp-crs328-4c-20s-4s-bit.dtb \
+ armada-xp-db-xc3-24g4xg.dtb \
+ armada-xp-gp.dtb \
+ armada-xp-maxbcm.dtb \
+ armada-xp-synology-ds414.dtb \
+ armada-xp-theadorable.dtb
+else
+dtb-$(CONFIG_ARCH_MVEBU) += \
+ armada-3720-db.dtb \
+ armada-3720-espressobin.dtb \
+ armada-3720-turris-mox.dtb \
+ armada-3720-eDPU.dtb \
+ armada-3720-uDPU.dtb \
+ armada-7040-db-nand.dtb \
+ armada-7040-db.dtb \
+ armada-8040-clearfog-gt-8k.dtb \
+ armada-8040-db.dtb \
+ armada-8040-mcbin.dtb \
+ armada-8040-puzzle-m801.dtb \
+ cn9130-db-A.dtb \
+ cn9130-db-B.dtb \
+ cn9131-db-A.dtb \
+ cn9131-db-B.dtb \
+ cn9132-db-A.dtb \
+ cn9132-db-B.dtb \
+ cn9130-crb-A.dtb \
+ cn9130-crb-B.dtb
+endif
+
+dtb-$(CONFIG_ARCH_SYNQUACER) += synquacer-sc2a11-developerbox.dtb
+dtb-$(CONFIG_ARCH_UNIPHIER_LD11) += \
+ uniphier-ld11-global.dtb \
+ uniphier-ld11-ref.dtb
+dtb-$(CONFIG_ARCH_UNIPHIER_LD20) += \
+ uniphier-ld20-akebi96.dtb \
+ uniphier-ld20-global.dtb \
+ uniphier-ld20-ref.dtb
+dtb-$(CONFIG_ARCH_UNIPHIER_LD4) += \
+ uniphier-ld4-ref.dtb
+dtb-$(CONFIG_ARCH_UNIPHIER_LD6B) += \
+ uniphier-ld6b-ref.dtb
+dtb-$(CONFIG_ARCH_UNIPHIER_PRO4) += \
+ uniphier-pro4-ace.dtb \
+ uniphier-pro4-ref.dtb \
+ uniphier-pro4-sanji.dtb
+dtb-$(CONFIG_ARCH_UNIPHIER_PRO5) += \
+ uniphier-pro5-4kbox.dtb
+dtb-$(CONFIG_ARCH_UNIPHIER_PXS2) += \
+ uniphier-pxs2-gentil.dtb \
+ uniphier-pxs2-vodka.dtb
+dtb-$(CONFIG_ARCH_UNIPHIER_PXS3) += \
+ uniphier-pxs3-ref.dtb
+dtb-$(CONFIG_ARCH_UNIPHIER_SLD8) += \
+ uniphier-sld8-ref.dtb
+
+dtb-$(CONFIG_ARCH_ZYNQ) += \
+ bitmain-antminer-s9.dtb \
+ zynq-cc108.dtb \
+ zynq-cse-nand.dtb \
+ zynq-cse-nor.dtb \
+ zynq-cse-qspi-single.dtb \
+ zynq-dlc20-rev1.0.dtb \
+ zynq-microzed.dtb \
+ zynq-minized.dtb \
+ zynq-picozed.dtb \
+ zynq-syzygy-hub.dtb \
+ zynq-topic-miami.dtb \
+ zynq-topic-miamilite.dtb \
+ zynq-topic-miamiplus.dtb \
+ zynq-zc702.dtb \
+ zynq-zc706.dtb \
+ zynq-zc770-xm010.dtb \
+ zynq-zc770-xm011.dtb \
+ zynq-zc770-xm011-x16.dtb \
+ zynq-zc770-xm012.dtb \
+ zynq-zc770-xm013.dtb \
+ zynq-zed.dtb \
+ zynq-zturn.dtb \
+ zynq-zturn-v5.dtb \
+ zynq-zybo.dtb \
+ zynq-zybo-z7.dtb
+dtb-$(CONFIG_ARCH_ZYNQMP) += \
+ avnet-ultra96-rev1.dtb \
+ avnet-ultrazedev-cc-v1.0-ultrazedev-som-v1.0.dtb \
+ zynqmp-a2197-revA.dtb \
+ zynqmp-dlc21-revA.dtb \
+ zynqmp-e-a2197-00-revA.dtb \
+ zynqmp-g-a2197-00-revA.dtb \
+ zynqmp-m-a2197-01-revA.dtb \
+ zynqmp-m-a2197-02-revA.dtb \
+ zynqmp-m-a2197-03-revA.dtb \
+ zynqmp-p-a2197-00-revA.dtb \
+ zynqmp-mini.dtb \
+ zynqmp-mini-emmc0.dtb \
+ zynqmp-mini-emmc1.dtb \
+ zynqmp-mini-nand.dtb \
+ zynqmp-mini-qspi.dtb \
+ zynqmp-sm-k26-revA.dtb \
+ zynqmp-smk-k26-revA.dtb \
+ zynqmp-sck-kr-g-revA.dtbo \
+ zynqmp-sck-kr-g-revB.dtbo \
+ zynqmp-sck-kv-g-revA.dtbo \
+ zynqmp-sck-kv-g-revB.dtbo \
+ zynqmp-topic-miamimp-xilinx-xdp-v1r1.dtb \
+ zynqmp-zcu100-revC.dtb \
+ zynqmp-zcu102-revA.dtb \
+ zynqmp-zcu102-revB.dtb \
+ zynqmp-zcu102-rev1.0.dtb \
+ zynqmp-zcu102-rev1.1.dtb \
+ zynqmp-zcu104-revA.dtb \
+ zynqmp-zcu104-revC.dtb \
+ zynqmp-zcu106-revA.dtb \
+ zynqmp-zcu106-rev1.0.dtb \
+ zynqmp-zcu111-revA.dtb \
+ zynqmp-zcu1275-revA.dtb \
+ zynqmp-zcu1275-revB.dtb \
+ zynqmp-zcu1285-revA.dtb \
+ zynqmp-zcu208-revA.dtb \
+ zynqmp-zcu216-revA.dtb \
+ zynqmp-zc1232-revA.dtb \
+ zynqmp-zc1254-revA.dtb \
+ zynqmp-zc1751-xm015-dc1.dtb \
+ zynqmp-zc1751-xm016-dc2.dtb \
+ zynqmp-zc1751-xm017-dc3.dtb \
+ zynqmp-zc1751-xm018-dc4.dtb \
+ zynqmp-zc1751-xm019-dc5.dtb
+dtb-$(CONFIG_ARCH_VERSAL) += \
+ versal-mini.dtb \
+ versal-mini-emmc0.dtb \
+ versal-mini-emmc1.dtb \
+ xilinx-versal-virt.dtb
+dtb-$(CONFIG_ARCH_ZYNQMP_R5) += \
+ zynqmp-r5.dtb
+dtb-$(CONFIG_AM33XX) += \
+ am335x-baltos.dtb \
+ am335x-bone.dtb \
+ am335x-boneblack.dtb \
+ am335x-boneblack-wireless.dtb \
+ am335x-boneblue.dtb \
+ am335x-brppt1-mmc.dtb \
+ am335x-brppt1-nand.dtb \
+ am335x-brppt1-spi.dtb \
+ am335x-brxre1.dtb \
+ am335x-brsmarc1.dtb \
+ am335x-draco.dtb \
+ am335x-evm.dtb \
+ am335x-evmsk.dtb \
+ am335x-bonegreen.dtb \
+ am335x-bonegreen-wireless.dtb \
+ am335x-icev2.dtb \
+ am335x-pocketbeagle.dtb \
+ am335x-pxm50.dtb \
+ am335x-rut.dtb \
+ am335x-sancloud-bbe.dtb \
+ am335x-sancloud-bbe-lite.dtb \
+ am335x-sancloud-bbe-extended-wifi.dtb \
+ am335x-shc.dtb \
+ am335x-pdu001.dtb \
+ am335x-chiliboard.dtb \
+ am335x-sl50.dtb \
+ am335x-base0033.dtb \
+ am335x-guardian.dtb \
+ am335x-wega-rdk.dtb \
+ am335x-regor-rdk.dtb
+dtb-$(CONFIG_AM43XX) += am437x-gp-evm.dtb am437x-sk-evm.dtb \
+ am43x-epos-evm.dtb \
+ am437x-idk-evm.dtb \
+ am4372-generic.dtb \
+ am437x-cm-t43.dtb
+dtb-$(CONFIG_TARGET_AM3517_EVM) += am3517-evm.dtb
+dtb-$(CONFIG_TI816X) += dm8168-evm.dtb
+dtb-$(CONFIG_TARGET_THUNDERX_88XX) += thunderx-88xx.dtb
+
+dtb-$(CONFIG_ARCH_SOCFPGA) += \
+ socfpga_agilex_socdk.dtb \
+ socfpga_arria5_secu1.dtb \
+ socfpga_arria5_socdk.dtb \
+ socfpga_arria10_chameleonv3_270_3.dtb \
+ socfpga_arria10_chameleonv3_480_2.dtb \
+ socfpga_arria10_socdk_sdmmc.dtb \
+ socfpga_cyclone5_mcvevk.dtb \
+ socfpga_cyclone5_is1.dtb \
+ socfpga_cyclone5_socdk.dtb \
+ socfpga_cyclone5_dbm_soc1.dtb \
+ socfpga_cyclone5_de0_nano_soc.dtb \
+ socfpga_cyclone5_de1_soc.dtb \
+ socfpga_cyclone5_de10_nano.dtb \
+ socfpga_cyclone5_sockit.dtb \
+ socfpga_cyclone5_socrates.dtb \
+ socfpga_cyclone5_sr1500.dtb \
+ socfpga_cyclone5_vining_fpga.dtb \
+ socfpga_n5x_socdk.dtb \
+ socfpga_stratix10_socdk.dtb
+
+dtb-$(CONFIG_TARGET_DRA7XX_EVM) += dra72-evm.dtb dra7-evm.dtb \
+ dra72-evm-revc.dtb dra71-evm.dtb dra76-evm.dtb
+dtb-$(CONFIG_TARGET_AM57XX_EVM) += am57xx-beagle-x15.dtb \
+ am57xx-beagle-x15-revb1.dtb \
+ am57xx-beagle-x15-revc.dtb \
+ am5729-beagleboneai.dtb \
+ am574x-idk.dtb \
+ am572x-idk.dtb \
+ am571x-idk.dtb
+dtb-$(CONFIG_TARGET_STV0991) += stv0991.dtb
+
+dtb-$(CONFIG_ARCH_LS1021A) += ls1021a-qds-duart.dtb \
+ ls1021a-qds-lpuart.dtb \
+ ls1021a-twr-duart.dtb ls1021a-twr-lpuart.dtb \
+ ls1021a-iot-duart.dtb ls1021a-tsn.dtb
+dtb-$(CONFIG_TARGET_PG_WCOM_SELI8) += ls1021a-pg-wcom-seli8.dtb
+dtb-$(CONFIG_TARGET_PG_WCOM_EXPU1) += ls1021a-pg-wcom-expu1.dtb
+
+dtb-$(CONFIG_FSL_LSCH3) += fsl-ls2080a-qds.dtb \
+ fsl-ls2080a-qds-42-x.dtb \
+ fsl-ls2080a-rdb.dtb \
+ fsl-ls2081a-rdb.dtb \
+ fsl-ls2088a-rdb-qspi.dtb \
+ fsl-ls1088a-rdb.dtb \
+ fsl-ls1088a-qds.dtb \
+ fsl-ls1088a-qds-21-x.dtb \
+ fsl-ls1088a-qds-29-x.dtb \
+ fsl-ls1028a-rdb.dtb \
+ fsl-ls1028a-qds-duart.dtb \
+ fsl-ls1028a-qds-lpuart.dtb \
+ fsl-lx2160a-rdb.dtb \
+ fsl-lx2160a-qds.dtb \
+ fsl-lx2160a-qds-3-x-x.dtb \
+ fsl-lx2160a-qds-3-11-x.dtb \
+ fsl-lx2160a-qds-7-x-x.dtb \
+ fsl-lx2160a-qds-7-11-x.dtb \
+ fsl-lx2160a-qds-19-x-x.dtb \
+ fsl-lx2160a-qds-19-11-x.dtb \
+ fsl-lx2160a-qds-20-x-x.dtb \
+ fsl-lx2160a-qds-20-11-x.dtb \
+ fsl-lx2162a-qds.dtb\
+ fsl-lx2162a-qds-17-x.dtb\
+ fsl-lx2162a-qds-18-x.dtb\
+ fsl-lx2162a-qds-20-x.dtb
+dtb-$(CONFIG_FSL_LSCH2) += fsl-ls1043a-qds-duart.dtb \
+ fsl-ls1043a-qds-lpuart.dtb \
+ fsl-ls1043a-rdb.dtb \
+ fsl-ls1046a-qds-duart.dtb \
+ fsl-ls1046a-qds-lpuart.dtb \
+ fsl-ls1046a-rdb.dtb \
+ fsl-ls1046a-frwy.dtb \
+ fsl-ls1012a-qds.dtb \
+ fsl-ls1012a-rdb.dtb \
+ fsl-ls1012a-2g5rdb.dtb \
+ fsl-ls1012a-frdm.dtb \
+ fsl-ls1012a-frwy.dtb
+dtb-$(CONFIG_TARGET_SL28) += fsl-ls1028a-kontron-sl28.dtb \
+ fsl-ls1028a-kontron-sl28-var1.dtb \
+ fsl-ls1028a-kontron-sl28-var2.dtb \
+ fsl-ls1028a-kontron-sl28-var3.dtb \
+ fsl-ls1028a-kontron-sl28-var4.dtb \
+
+dtb-$(CONFIG_TARGET_TEN64) += fsl-ls1088a-ten64.dtb
+
+dtb-$(CONFIG_TARGET_DRAGONBOARD410C) += dragonboard410c.dtb
+dtb-$(CONFIG_TARGET_DRAGONBOARD820C) += dragonboard820c.dtb
+dtb-$(CONFIG_TARGET_STARQLTECHN) += starqltechn.dtb
+dtb-$(CONFIG_TARGET_QCS404EVB) += qcs404-evb.dtb
+
+dtb-$(CONFIG_TARGET_STEMMY) += ste-ux500-samsung-stemmy.dtb
+
+dtb-$(CONFIG_STM32F4) += stm32f429-disco.dtb \
+ stm32429i-eval.dtb \
+ stm32f469-disco.dtb
+
+dtb-$(CONFIG_STM32F7) += stm32f746-disco.dtb \
+ stm32f769-disco.dtb \
+ stm32746g-eval.dtb
+dtb-$(CONFIG_STM32H7) += stm32h743i-disco.dtb \
+ stm32h743i-eval.dtb \
+ stm32h750i-art-pi.dtb
+
+dtb-$(CONFIG_MACH_SUNIV) += \
+ suniv-f1c100s-licheepi-nano.dtb
+dtb-$(CONFIG_MACH_SUN4I) += \
+ sun4i-a10-a1000.dtb \
+ sun4i-a10-ba10-tvbox.dtb \
+ sun4i-a10-chuwi-v7-cw0825.dtb \
+ sun4i-a10-cubieboard.dtb \
+ sun4i-a10-dserve-dsrv9703c.dtb \
+ sun4i-a10-gemei-g9.dtb \
+ sun4i-a10-hackberry.dtb \
+ sun4i-a10-hyundai-a7hd.dtb \
+ sun4i-a10-inet1.dtb \
+ sun4i-a10-inet-3f.dtb \
+ sun4i-a10-inet-3w.dtb \
+ sun4i-a10-inet97fv2.dtb \
+ sun4i-a10-inet9f-rev03.dtb \
+ sun4i-a10-itead-iteaduino-plus.dtb \
+ sun4i-a10-jesurun-q5.dtb \
+ sun4i-a10-marsboard.dtb \
+ sun4i-a10-mini-xplus.dtb \
+ sun4i-a10-mk802.dtb \
+ sun4i-a10-mk802ii.dtb \
+ sun4i-a10-olinuxino-lime.dtb \
+ sun4i-a10-pcduino.dtb \
+ sun4i-a10-pcduino2.dtb \
+ sun4i-a10-pov-protab2-ips9.dtb \
+ sun4i-a10-topwise-a721.dtb
+dtb-$(CONFIG_MACH_SUN5I) += \
+ sun5i-a10s-auxtek-t003.dtb \
+ sun5i-a10s-auxtek-t004.dtb \
+ sun5i-a10s-mk802.dtb \
+ sun5i-a10s-olinuxino-micro.dtb \
+ sun5i-a10s-r7-tv-dongle.dtb \
+ sun5i-a10s-wobo-i5.dtb \
+ sun5i-a13-ampe-a76.dtb \
+ sun5i-a13-difrnce-dit4350.dtb \
+ sun5i-a13-empire-electronix-d709.dtb \
+ sun5i-a13-empire-electronix-m712.dtb \
+ sun5i-a13-hsg-h702.dtb \
+ sun5i-a13-inet-86vs.dtb \
+ sun5i-a13-inet-98v-rev2.dtb \
+ sun5i-a13-licheepi-one.dtb \
+ sun5i-a13-olinuxino.dtb \
+ sun5i-a13-olinuxino-micro.dtb \
+ sun5i-a13-pocketbook-touch-lux-3.dtb \
+ sun5i-a13-q8-tablet.dtb \
+ sun5i-a13-utoo-p66.dtb \
+ sun5i-gr8-chip-pro.dtb \
+ sun5i-gr8-evb.dtb \
+ sun5i-r8-chip.dtb
+dtb-$(CONFIG_MACH_SUN6I) += \
+ sun6i-a31-app4-evb1.dtb \
+ sun6i-a31-colombus.dtb \
+ sun6i-a31-hummingbird.dtb \
+ sun6i-a31-i7.dtb \
+ sun6i-a31-m9.dtb \
+ sun6i-a31-mele-a1000g-quad.dtb \
+ sun6i-a31-mixtile-loftq.dtb \
+ sun6i-a31s-colorfly-e708-q1.dtb \
+ sun6i-a31s-cs908.dtb \
+ sun6i-a31s-inet-q972.dtb \
+ sun6i-a31s-primo81.dtb \
+ sun6i-a31s-sina31s.dtb \
+ sun6i-a31s-sinovoip-bpi-m2.dtb \
+ sun6i-a31s-yones-toptech-bs1078-v2.dtb
+dtb-$(CONFIG_MACH_SUN7I) += \
+ sun7i-a20-ainol-aw1.dtb \
+ sun7i-a20-bananapi.dtb \
+ sun7i-a20-bananapi-m1-plus.dtb \
+ sun7i-a20-bananapro.dtb \
+ sun7i-a20-cubieboard2.dtb \
+ sun7i-a20-cubietruck.dtb \
+ sun7i-a20-haoyu-marsboard.dtb \
+ sun7i-a20-hummingbird.dtb \
+ sun7i-a20-i12-tvbox.dtb \
+ sun7i-a20-icnova-swac.dtb \
+ sun7i-a20-itead-ibox.dtb \
+ sun7i-a20-lamobo-r1.dtb \
+ sun7i-a20-linutronix-testbox-v2.dtb \
+ sun7i-a20-m3.dtb \
+ sun7i-a20-m5.dtb \
+ sun7i-a20-mk808c.dtb \
+ sun7i-a20-olimex-som-evb.dtb \
+ sun7i-a20-olimex-som204-evb.dtb \
+ sun7i-a20-olimex-som204-evb-emmc.dtb \
+ sun7i-a20-olinuxino-lime.dtb \
+ sun7i-a20-olinuxino-lime-emmc.dtb \
+ sun7i-a20-olinuxino-lime2.dtb \
+ sun7i-a20-olinuxino-lime2-emmc.dtb \
+ sun7i-a20-olinuxino-micro.dtb \
+ sun7i-a20-olinuxino-micro-emmc.dtb \
+ sun7i-a20-orangepi.dtb \
+ sun7i-a20-orangepi-mini.dtb \
+ sun7i-a20-pcduino3.dtb \
+ sun7i-a20-pcduino3-nano.dtb \
+ sun7i-a20-primo73.dtb \
+ sun7i-a20-wexler-tab7200.dtb \
+ sun7i-a20-wits-pro-a20-dkt.dtb \
+ sun7i-a20-yones-toptech-bd1078.dtb
+dtb-$(CONFIG_MACH_SUN8I_A23) += \
+ sun8i-a23-evb.dtb \
+ sun8i-a23-gt90h-v4.dtb \
+ sun8i-a23-inet86dz.dtb \
+ sun8i-a23-ippo-q8h-v1.2.dtb \
+ sun8i-a23-ippo-q8h-v5.dtb \
+ sun8i-a23-polaroid-mid2407pxe03.dtb \
+ sun8i-a23-polaroid-mid2809pxe04.dtb \
+ sun8i-a23-q8-tablet.dtb
+dtb-$(CONFIG_MACH_SUN8I_A33) += \
+ sun8i-a33-et-q8-v1.6.dtb \
+ sun8i-a33-ga10h-v1.1.dtb \
+ sun8i-a33-inet-d978-rev2.dtb \
+ sun8i-a33-ippo-q8h-v1.2.dtb \
+ sun8i-a33-olinuxino.dtb \
+ sun8i-a33-q8-tablet.dtb \
+ sun8i-a33-sinlinx-sina33.dtb \
+ sun8i-r16-bananapi-m2m.dtb \
+ sun8i-r16-nintendo-nes-classic.dtb \
+ sun8i-r16-nintendo-super-nes-classic.dtb \
+ sun8i-r16-parrot.dtb
+dtb-$(CONFIG_MACH_SUN8I_A83T) += \
+ sun8i-a83t-allwinner-h8homlet-v2.dtb \
+ sun8i-a83t-bananapi-m3.dtb \
+ sun8i-a83t-cubietruck-plus.dtb \
+ sun8i-a83t-tbs-a711.dtb
+dtb-$(CONFIG_MACH_SUN8I_H3) += \
+ sun8i-h2-plus-bananapi-m2-zero.dtb \
+ sun8i-h2-plus-libretech-all-h3-cc.dtb \
+ sun8i-h2-plus-orangepi-r1.dtb \
+ sun8i-h2-plus-orangepi-zero.dtb \
+ sun8i-h3-bananapi-m2-plus.dtb \
+ sun8i-h3-bananapi-m2-plus-v1.2.dtb \
+ sun8i-h3-beelink-x2.dtb \
+ sun8i-h3-emlid-neutis-n5h3-devboard.dtb \
+ sun8i-h3-libretech-all-h3-cc.dtb \
+ sun8i-h3-mapleboard-mp130.dtb \
+ sun8i-h3-nanopi-duo2.dtb \
+ sun8i-h3-nanopi-m1.dtb \
+ sun8i-h3-nanopi-m1-plus.dtb \
+ sun8i-h3-nanopi-neo.dtb \
+ sun8i-h3-nanopi-neo-air.dtb \
+ sun8i-h3-nanopi-r1.dtb \
+ sun8i-h3-orangepi-2.dtb \
+ sun8i-h3-orangepi-lite.dtb \
+ sun8i-h3-orangepi-one.dtb \
+ sun8i-h3-orangepi-pc.dtb \
+ sun8i-h3-orangepi-pc-plus.dtb \
+ sun8i-h3-orangepi-plus.dtb \
+ sun8i-h3-orangepi-plus2e.dtb \
+ sun8i-h3-orangepi-zero-plus2.dtb \
+ sun8i-h3-rervision-dvk.dtb \
+ sun8i-h3-zeropi.dtb
+dtb-$(CONFIG_MACH_SUN8I_R40) += \
+ sun8i-r40-bananapi-m2-ultra.dtb \
+ sun8i-r40-oka40i-c.dtb \
+ sun8i-t3-cqa3t-bv3.dtb \
+ sun8i-v40-bananapi-m2-berry.dtb
+dtb-$(CONFIG_MACH_SUN8I_V3S) += \
+ sun8i-s3-elimo-initium.dtb \
+ sun8i-s3-pinecube.dtb \
+ sun8i-v3-sl631-imx179.dtb \
+ sun8i-v3s-licheepi-zero.dtb
+dtb-$(CONFIG_MACH_SUN50I_H5) += \
+ sun50i-h5-repka-pi3-1.0ghz.dtb \
+ sun50i-h5-repka-pi3-1.2ghz.dtb \
+ sun50i-h5-repka-pi3-1.4ghz.dtb \
+ sun50i-h5-repka-pi3-alt-1.0ghz.dtb \
+ sun50i-h5-repka-pi3-alt-1.2ghz.dtb \
+ sun50i-h5-repka-pi3-alt-1.4ghz.dtb \
+ sun50i-h5-repka-pi3-alt-uart-1.0ghz.dtb \
+ sun50i-h5-repka-pi3-alt-uart-1.2ghz.dtb \
+ sun50i-h5-repka-pi3-alt-uart-1.4ghz.dtb \
+ sun50i-h5-repka-pi3-alt-pwm-1.0ghz.dtb \
+ sun50i-h5-repka-pi3-alt-pwm-1.2ghz.dtb \
+ sun50i-h5-repka-pi3-alt-pwm-1.4ghz.dtb \
+ sun50i-h5-repka-pi3-alt-i2c2-1.0ghz.dtb \
+ sun50i-h5-repka-pi3-alt-i2c2-1.2ghz.dtb \
+ sun50i-h5-repka-pi3-alt-i2c2-1.4ghz.dtb \
+ sun50i-h5-bananapi-m2-plus.dtb \
+ sun50i-h5-emlid-neutis-n5-devboard.dtb \
+ sun50i-h5-libretech-all-h3-cc.dtb \
+ sun50i-h5-libretech-all-h3-it.dtb \
+ sun50i-h5-libretech-all-h5-cc.dtb \
+ sun50i-h5-nanopi-neo2.dtb \
+ sun50i-h5-nanopi-neo-plus2.dtb \
+ sun50i-h5-nanopi-r1s-h5.dtb \
+ sun50i-h5-orangepi-zero-plus.dtb \
+ sun50i-h5-orangepi-pc2.dtb \
+ sun50i-h5-orangepi-prime.dtb \
+ sun50i-h5-orangepi-zero-plus2.dtb
+dtb-$(CONFIG_MACH_SUN50I_H6) += \
+ sun50i-h6-beelink-gs1.dtb \
+ sun50i-h6-orangepi-3.dtb \
+ sun50i-h6-orangepi-lite2.dtb \
+ sun50i-h6-orangepi-one-plus.dtb \
+ sun50i-h6-pine-h64.dtb \
+ sun50i-h6-pine-h64-model-b.dtb \
+ sun50i-h6-tanix-tx6.dtb \
+ sun50i-h6-tanix-tx6-mini.dtb
+dtb-$(CONFIG_MACH_SUN50I_H616) += \
+ sun50i-h616-orangepi-zero2.dtb
+dtb-$(CONFIG_MACH_SUN50I) += \
+ sun50i-a64-amarula-relic.dtb \
+ sun50i-a64-bananapi-m64.dtb \
+ sun50i-a64-nanopi-a64.dtb \
+ sun50i-a64-oceanic-5205-5inmfd.dtb \
+ sun50i-a64-olinuxino.dtb \
+ sun50i-a64-olinuxino-emmc.dtb \
+ sun50i-a64-orangepi-win.dtb \
+ sun50i-a64-pine64-lts.dtb \
+ sun50i-a64-pine64-plus.dtb \
+ sun50i-a64-pine64.dtb \
+ sun50i-a64-pinebook.dtb \
+ sun50i-a64-pinephone-1.0.dtb \
+ sun50i-a64-pinephone-1.1.dtb \
+ sun50i-a64-pinephone-1.2.dtb \
+ sun50i-a64-pinetab.dtb \
+ sun50i-a64-sopine-baseboard.dtb \
+ sun50i-a64-teres-i.dtb
+dtb-$(CONFIG_MACH_SUN9I) += \
+ sun9i-a80-optimus.dtb \
+ sun9i-a80-cubieboard4.dtb \
+ sun9i-a80-cx-a99.dtb
+
+dtb-$(CONFIG_VF610) += vf610-colibri-eval-v3.dtb \
+ vf610-twr.dtb \
+ vf610-pcm052.dtb \
+ vf610-bk4r1.dtb
+
+dtb-$(CONFIG_MX23) += \
+ imx23-evk.dtb
+
+dtb-$(CONFIG_TARGET_MX23_OLINUXINO) += \
+ imx23-olinuxino.dtb
+
+dtb-$(CONFIG_MX28) += \
+ imx28-evk.dtb \
+ imx28-xea.dtb
+
+dtb-$(CONFIG_MX51) += \
+ imx51-babbage.dtb
+
+dtb-$(CONFIG_MX53) += imx53-cx9020.dtb \
+ imx53-qsb.dtb \
+ imx53-kp.dtb \
+ imx53-m53menlo.dtb \
+ imx53-usbarmory.dtb
+
+ifneq ($(CONFIG_MX6DL)$(CONFIG_MX6QDL)$(CONFIG_MX6S),)
+dtb-y += \
+ imx6dl-aristainetos2c_7.dtb \
+ imx6dl-aristainetos2c_cslb_7.dtb \
+ imx6dl-brppt2.dtb \
+ imx6dl-cubox-i.dtb \
+ imx6dl-cubox-i-emmc-som-v15.dtb \
+ imx6dl-cubox-i-som-v15.dtb \
+ imx6dl-dhcom-pdk2.dtb \
+ imx6dl-dhcom-picoitx.dts \
+ imx6dl-gw51xx.dtb \
+ imx6dl-gw52xx.dtb \
+ imx6dl-gw53xx.dtb \
+ imx6dl-gw54xx.dtb \
+ imx6dl-gw551x.dtb \
+ imx6dl-gw552x.dtb \
+ imx6dl-gw553x.dtb \
+ imx6dl-gw560x.dtb \
+ imx6dl-gw5903.dtb \
+ imx6dl-gw5904.dtb \
+ imx6dl-gw5907.dtb \
+ imx6dl-gw5910.dtb \
+ imx6dl-gw5912.dtb \
+ imx6dl-gw5913.dtb \
+ imx6dl-hummingboard2.dtb \
+ imx6dl-hummingboard2-emmc-som-v15.dtb \
+ imx6dl-hummingboard2-som-v15.dtb \
+ imx6dl-hummingboard.dtb \
+ imx6dl-hummingboard-emmc-som-v15.dtb \
+ imx6dl-hummingboard-som-v15.dtb \
+ imx6dl-icore.dtb \
+ imx6dl-icore-mipi.dtb \
+ imx6dl-icore-rqs.dtb \
+ imx6dl-mba6a.dtb \
+ imx6dl-mba6b.dtb \
+ imx6dl-mamoj.dtb \
+ imx6dl-nitrogen6x.dtb \
+ imx6dl-pico.dtb \
+ imx6dl-udoo.dtb \
+ imx6dl-riotboard.dtb \
+ imx6dl-sabreauto.dtb \
+ imx6dl-sabresd.dtb \
+ imx6dl-wandboard-revd1.dtb \
+ imx6s-dhcom-drc02.dtb
+
+endif
+
+ifneq ($(CONFIG_MX6Q)$(CONFIG_MX6QDL),)
+dtb-y += \
+ imx6q-apalis-eval.dtb \
+ imx6q-bosch-acc.dtb \
+ imx6q-cm-fx6.dtb \
+ imx6q-cubox-i.dtb \
+ imx6q-cubox-i-emmc-som-v15.dtb \
+ imx6q-cubox-i-som-v15.dtb \
+ imx6q-dhcom-pdk2.dtb \
+ imx6q-display5.dtb \
+ imx6q-gw51xx.dtb \
+ imx6q-gw52xx.dtb \
+ imx6q-gw53xx.dtb \
+ imx6q-gw54xx.dtb \
+ imx6q-gw551x.dtb \
+ imx6q-gw552x.dtb \
+ imx6q-gw553x.dtb \
+ imx6q-gw560x.dtb \
+ imx6q-gw5903.dtb \
+ imx6q-gw5904.dtb \
+ imx6q-gw5907.dtb \
+ imx6q-gw5910.dtb \
+ imx6q-gw5912.dtb \
+ imx6q-gw5913.dtb \
+ imx6q-hummingboard2.dtb \
+ imx6q-hummingboard2-emmc-som-v15.dtb \
+ imx6q-hummingboard2-som-v15.dtb \
+ imx6q-hummingboard.dtb \
+ imx6q-hummingboard-emmc-som-v15.dtb \
+ imx6q-hummingboard-som-v15.dtb \
+ imx6q-icore.dtb \
+ imx6q-icore-mipi.dtb \
+ imx6q-icore-rqs.dtb \
+ imx6q-kp.dtb \
+ imx6q-logicpd.dtb \
+ imx6q-marsboard.dtb \
+ imx6q-mba6a.dtb \
+ imx6q-mba6b.dtb \
+ imx6q-mccmon6.dtb\
+ imx6q-nitrogen6x.dtb \
+ imx6q-novena.dtb \
+ imx6q-pico.dtb \
+ imx6q-phytec-mira-rdk-nand.dtb \
+ imx6q-udoo.dtb \
+ imx6q-sabreauto.dtb \
+ imx6q-sabrelite.dtb \
+ imx6q-sabresd.dtb \
+ imx6q-tbs2910.dtb \
+ imx6q-wandboard-revd1.dtb \
+ imx6qp-sabreauto.dtb \
+ imx6qp-sabresd.dtb \
+ imx6qp-wandboard-revd1.dtb \
+
+endif
+
+dtb-$(CONFIG_MX6SL) += imx6sl-evk.dtb
+
+dtb-$(CONFIG_MX6SLL) += imx6sll-evk.dtb
+
+dtb-$(CONFIG_MX6SX) += \
+ imx6sx-sabreauto.dtb \
+ imx6sx-sdb.dtb \
+ imx6sx-softing-vining-2000.dtb \
+ imx6sx-udoo-neo-basic.dtb \
+ imx6sx-udoo-neo-extended.dtb \
+ imx6sx-udoo-neo-full.dtb
+
+dtb-$(CONFIG_MX6UL) += \
+ imx6ul-geam.dtb \
+ imx6ul-isiot-emmc.dtb \
+ imx6ul-isiot-nand.dtb \
+ imx6ul-opos6uldev.dtb \
+ imx6ul-14x14-evk.dtb \
+ imx6ul-9x9-evk.dtb \
+ imx6ul-9x9-evk.dtb \
+ imx6ul-liteboard.dtb \
+ imx6ul-phytec-segin-ff-rdk-nand.dtb \
+ imx6ul-pico-hobbit.dtb \
+ imx6ul-pico-pi.dtb \
+ imx6ul-kontron-n631x-s.dtb \
+ imx6ull-kontron-n641x-s.dtb
+
+dtb-$(CONFIG_MX6ULL) += \
+ imx6ull-14x14-evk.dtb \
+ imx6ull-colibri-emmc-eval-v3.dtb \
+ imx6ull-colibri-eval-v3.dtb \
+ imx6ull-myir-mys-6ulx-eval.dtb \
+ imx6ull-seeed-npi-imx6ull-dev-board.dtb \
+ imx6ull-phytec-segin-ff-rdk-emmc.dtb \
+ imx6ull-dart-6ul.dtb \
+ imx6ull-somlabs-visionsom.dtb \
+ imx6ulz-bsh-smm-m2.dtb \
+ imx6ulz-14x14-evk.dtb
+
+dtb-$(CONFIG_ARCH_MX6) += \
+ imx6q-apalis-eval.dtb \
+ imx6dl-colibri-eval-v3.dtb
+
+dtb-$(CONFIG_O4_IMX_NANO) += \
+ o4-imx-nano.dtb
+
+dtb-$(CONFIG_EV_IMX280_NANO_X_MB) += \
+ ev-imx280-nano-x-mb.dtb
+
+dtb-$(CONFIG_MX7) += imx7d-sdb.dtb \
+ imx7d-sdb-qspi.dtb \
+ imx7-cm.dtb \
+ imx7d-colibri-emmc-eval-v3.dtb \
+ imx7d-colibri-eval-v3.dtb \
+ imx7s-warp.dtb \
+ imx7d-meerkat96.dtb \
+ imx7d-pico-pi.dtb \
+ imx7d-pico-hobbit.dtb \
+ imx7d-smegw01.dtb
+
+dtb-$(CONFIG_ARCH_MX7ULP) += imx7ulp-com.dtb \
+ imx7ulp-evk.dtb
+
+dtb-$(CONFIG_ARCH_HIGHBANK) += highbank.dtb
+
+dtb-$(CONFIG_ARCH_IMX8) += \
+ fsl-imx8qm-apalis.dtb \
+ fsl-imx8qm-mek.dtb \
+ imx8qm-cgtqmx8.dtb \
+ imx8qm-rom7720-a1.dtb \
+ fsl-imx8qxp-ai_ml.dtb \
+ fsl-imx8qxp-colibri.dtb \
+ fsl-imx8qxp-mek.dtb \
+ imx8-deneb.dtb \
+ imx8-giedi.dtb
+
+dtb-$(CONFIG_ARCH_IMX8ULP) += \
+ imx8ulp-evk.dtb
+
+dtb-$(CONFIG_ARCH_IMX8M) += \
+ imx8mm-data-modul-edm-sbc.dtb \
+ imx8mm-evk.dtb \
+ imx8mm-icore-mx8mm-ctouch2.dtb \
+ imx8mm-icore-mx8mm-edimm2.2.dtb \
+ imx8mm-kontron-n801x-s.dtb \
+ imx8mm-kontron-n801x-s-lvds.dtb \
+ imx8mm-mx8menlo.dtb \
+ imx8mm-venice.dtb \
+ imx8mm-venice-gw71xx-0x.dtb \
+ imx8mm-venice-gw72xx-0x.dtb \
+ imx8mm-venice-gw73xx-0x.dtb \
+ imx8mm-venice-gw7901.dtb \
+ imx8mm-venice-gw7902.dtb \
+ imx8mm-venice-gw7903.dtb \
+ imx8mm-verdin-wifi-dev.dtb \
+ phycore-imx8mm.dtb \
+ imx8mn-bsh-smm-s2.dtb \
+ imx8mn-bsh-smm-s2pro.dtb \
+ imx8mn-ddr4-evk.dtb \
+ imx8mq-cm.dtb \
+ imx8mn-evk.dtb \
+ imx8mn-var-som-symphony.dtb \
+ imx8mn-venice.dtb \
+ imx8mn-venice-gw7902.dtb \
+ imx8mq-evk.dtb \
+ imx8mm-beacon-kit.dtb \
+ imx8mn-beacon-kit.dtb \
+ imx8mq-mnt-reform2.dtb \
+ imx8mq-phanbell.dtb \
+ imx8mp-dhcom-pdk2.dtb \
+ imx8mp-evk.dtb \
+ imx8mp-phyboard-pollux-rdk.dtb \
+ imx8mp-venice.dtb \
+ imx8mp-venice-gw74xx.dtb \
+ imx8mp-verdin-wifi-dev.dtb \
+ imx8mq-pico-pi.dtb \
+ imx8mq-kontron-pitx-imx8m.dtb \
+ imx8mq-librem5-r4.dtb
+
+dtb-$(CONFIG_ARCH_IMX9) += \
+ imx93-11x11-evk.dtb
+
+dtb-$(CONFIG_ARCH_IMXRT) += imxrt1050-evk.dtb \
+ imxrt1020-evk.dtb \
+ imxrt1170-evk.dtb \
+
+dtb-$(CONFIG_RCAR_GEN2) += \
+ r8a7790-lager-u-boot.dtb \
+ r8a7790-stout-u-boot.dtb \
+ r8a7791-koelsch-u-boot.dtb \
+ r8a7791-porter-u-boot.dtb \
+ r8a7792-blanche-u-boot.dtb \
+ r8a7793-gose-u-boot.dtb \
+ r8a7794-alt-u-boot.dtb \
+ r8a7794-silk-u-boot.dtb
+
+dtb-$(CONFIG_RCAR_GEN3) += \
+ r8a774a1-beacon-rzg2m-kit.dtb \
+ r8a774b1-beacon-rzg2n-kit.dtb \
+ r8a774e1-beacon-rzg2h-kit.dtb \
+ r8a774a1-hihope-rzg2m-u-boot.dtb \
+ r8a774b1-hihope-rzg2n-u-boot.dtb \
+ r8a774c0-ek874-u-boot.dtb \
+ r8a774e1-hihope-rzg2h-u-boot.dtb \
+ r8a77950-ulcb-u-boot.dtb \
+ r8a77950-salvator-x-u-boot.dtb \
+ r8a77960-ulcb-u-boot.dtb \
+ r8a77960-salvator-x-u-boot.dtb \
+ r8a77965-ulcb-u-boot.dtb \
+ r8a77965-salvator-x-u-boot.dtb \
+ r8a77970-eagle-u-boot.dtb \
+ r8a77980-condor-u-boot.dtb \
+ r8a77990-ebisu-u-boot.dtb \
+ r8a77995-draak-u-boot.dtb \
+ r8a779a0-falcon-u-boot.dtb
+
+ifdef CONFIG_RCAR_GEN3
+DTC_FLAGS += -R 4 -p 0x1000
+endif
+
+dtb-$(CONFIG_RZA1) += \
+ r7s72100-gr-peach-u-boot.dtb
+
+dtb-$(CONFIG_ARCH_KEYSTONE) += keystone-k2hk-evm.dtb \
+ keystone-k2l-evm.dtb \
+ keystone-k2e-evm.dtb \
+ keystone-k2g-evm.dtb \
+ keystone-k2g-generic.dtb \
+ keystone-k2g-ice.dtb
+
+dtb-$(CONFIG_TARGET_AT91SAM9261EK) += at91sam9261ek.dtb
+
+dtb-$(CONFIG_TARGET_PM9261) += at91sam9261ek.dtb
+
+dtb-$(CONFIG_TARGET_PM9263) += at91sam9263ek.dtb
+
+dtb-$(CONFIG_TARGET_MEESC) += at91sam9263ek.dtb
+
+dtb-$(CONFIG_TARGET_AT91SAM9263EK) += at91sam9263ek.dtb
+
+dtb-$(CONFIG_TARGET_AT91SAM9RLEK) += at91sam9rlek.dtb
+
+dtb-$(CONFIG_TARGET_AT91SAM9260EK) += \
+ at91sam9260ek.dtb \
+ at91sam9g20ek.dtb \
+ at91sam9g20ek_2mmc.dtb
+
+dtb-$(CONFIG_TARGET_AT91SAM9M10G45EK) += at91sam9m10g45ek.dtb
+
+dtb-$(CONFIG_TARGET_PM9G45) += at91sam9m10g45ek.dtb
+
+dtb-$(CONFIG_TARGET_AT91SAM9X5EK) += \
+ at91sam9g15ek.dtb \
+ at91sam9g25ek.dtb \
+ at91sam9g35ek.dtb \
+ at91sam9x25ek.dtb \
+ at91sam9x35ek.dtb
+
+dtb-$(CONFIG_TARGET_SAM9X60EK) += sam9x60ek.dtb
+
+dtb-$(CONFIG_TARGET_SAM9X60_CURIOSITY) += at91-sam9x60_curiosity.dtb
+
+dtb-$(CONFIG_TARGET_AT91SAM9N12EK) += at91sam9n12ek.dtb
+
+dtb-$(CONFIG_TARGET_GARDENA_SMART_GATEWAY_AT91SAM) += \
+ at91sam9g25-gardena-smart-gateway.dtb
+
+dtb-$(CONFIG_TARGET_ETHERNUT5) += ethernut5.dtb
+
+dtb-$(CONFIG_TARGET_USB_A9263) += usb_a9263.dtb
+
+dtb-$(CONFIG_TARGET_OMAP3_LOGIC) += \
+ logicpd-som-lv-35xx-devkit.dtb \
+ logicpd-som-lv-37xx-devkit.dtb \
+ logicpd-torpedo-35xx-devkit.dtb \
+ logicpd-torpedo-37xx-devkit.dtb
+
+dtb-$(CONFIG_TARGET_OMAP3_EVM) += \
+ omap3-evm-37xx.dtb \
+ omap3-evm.dtb
+
+dtb-$(CONFIG_TARGET_OMAP3_BEAGLE) += \
+ omap3-beagle-xm-ab.dtb \
+ omap3-beagle-xm.dtb \
+ omap3-beagle.dtb
+
+dtb-$(CONFIG_TARGET_DEVKIT8000) += omap3-devkit8000.dtb
+
+dtb-$(CONFIG_TARGET_OMAP3_IGEP00X0) += \
+ omap3-igep0020.dtb
+
+dtb-$(CONFIG_TARGET_OMAP4_PANDA) += \
+ omap4-panda.dtb \
+ omap4-panda-es.dtb
+
+dtb-$(CONFIG_TARGET_OMAP4_SDP4430) += \
+ omap4-sdp.dtb \
+ omap4-sdp-es23plus.dtb
+
+dtb-$(CONFIG_TARGET_OMAP5_UEVM) += \
+ omap5-uevm.dtb
+
+dtb-$(CONFIG_TARGET_SAMA7G5EK) += \
+ at91-sama7g5ek.dtb
+
+dtb-$(CONFIG_TARGET_SAMA5D2_PTC_EK) += \
+ at91-sama5d2_ptc_ek.dtb
+
+dtb-$(CONFIG_TARGET_SAMA5D2_XPLAINED) += \
+ at91-sama5d2_xplained.dtb
+
+dtb-$(CONFIG_TARGET_SAMA5D27_SOM1_EK) += \
+ at91-sama5d27_som1_ek.dtb \
+ at91-sama5d27_giantboard.dtb
+
+dtb-$(CONFIG_TARGET_SAMA5D27_WLSOM1_EK) += \
+ at91-sama5d27_wlsom1_ek.dtb
+
+dtb-$(CONFIG_TARGET_SAMA5D2_ICP) += \
+ at91-sama5d2_icp.dtb
+
+dtb-$(CONFIG_TARGET_SAMA5D3XEK) += \
+ sama5d31ek.dtb \
+ sama5d33ek.dtb \
+ sama5d34ek.dtb \
+ sama5d35ek.dtb \
+ sama5d36ek.dtb \
+ sama5d36ek_cmp.dtb
+
+dtb-$(CONFIG_TARGET_SAMA5D3_XPLAINED) += \
+ at91-sama5d3_xplained.dtb
+
+dtb-$(CONFIG_TARGET_SAMA5D4EK) += \
+ at91-sama5d4ek.dtb
+
+dtb-$(CONFIG_TARGET_SAMA5D4_XPLAINED) += \
+ at91-sama5d4_xplained.dtb
+
+dtb-$(CONFIG_TARGET_VINCO) += \
+ at91-vinco.dtb
+
+dtb-$(CONFIG_ARCH_BCM283X) += \
+ bcm2835-rpi-a.dtb \
+ bcm2835-rpi-a-plus.dtb \
+ bcm2835-rpi-b.dtb \
+ bcm2835-rpi-b-plus.dtb \
+ bcm2835-rpi-b-rev2.dtb \
+ bcm2835-rpi-cm1-io1.dtb \
+ bcm2835-rpi-zero.dtb \
+ bcm2835-rpi-zero-w.dtb\
+ bcm2836-rpi-2-b.dtb \
+ bcm2837-rpi-3-a-plus.dtb \
+ bcm2837-rpi-3-b.dtb \
+ bcm2837-rpi-3-b-plus.dtb \
+ bcm2837-rpi-cm3-io3.dtb \
+ bcm2711-rpi-4-b.dtb
+
+dtb-$(CONFIG_ARCH_BCM63158) += \
+ bcm963158.dtb
+
+dtb-$(CONFIG_ARCH_BCM68360) += \
+ bcm968360bg.dtb
+
+dtb-$(CONFIG_ARCH_BCM6753) += \
+ bcm96753ref.dtb
+
+dtb-$(CONFIG_ARCH_BCM6858) += \
+ bcm968580xref.dtb
+
+dtb-$(CONFIG_TARGET_BCMNS3) += ns3-board.dtb
+
+dtb-$(CONFIG_ARCH_BCMSTB) += bcm7xxx.dtb
+
+dtb-$(CONFIG_BCM47622) += \
+ bcm947622.dtb
+
+dtb-$(CONFIG_ASPEED_AST2500) += ast2500-evb.dtb
+dtb-$(CONFIG_ASPEED_AST2600) += ast2600-evb.dtb
+
+dtb-$(CONFIG_ARCH_STI) += stih410-b2260.dtb
+
+dtb-$(CONFIG_STM32MP13x) += \
+ stm32mp135f-dk.dtb
+
+dtb-$(CONFIG_STM32MP15x) += \
+ stm32mp157a-dk1.dtb \
+ stm32mp157a-dk1-scmi.dtb \
+ stm32mp157a-icore-stm32mp1-ctouch2.dtb \
+ stm32mp157a-icore-stm32mp1-edimm2.2.dtb \
+ stm32mp157a-microgea-stm32mp1-microdev2.0.dtb \
+ stm32mp157a-microgea-stm32mp1-microdev2.0-of7.dtb \
+ stm32mp157c-dk2.dtb \
+ stm32mp157c-dk2-scmi.dtb \
+ stm32mp157c-ed1.dtb \
+ stm32mp157c-ed1-scmi.dtb \
+ stm32mp157c-ev1.dtb \
+ stm32mp157c-ev1-scmi.dtb \
+ stm32mp157c-odyssey.dtb \
+ stm32mp15xx-dhcom-drc02.dtb \
+ stm32mp15xx-dhcom-pdk2.dtb \
+ stm32mp15xx-dhcom-picoitx.dtb \
+ stm32mp15xx-dhcor-avenger96.dtb \
+ stm32mp15xx-dhcor-drc-compact.dtb
+
+dtb-$(CONFIG_SOC_K3_AM654) += \
+ k3-am654-base-board.dtb \
+ k3-am654-r5-base-board.dtb \
+ k3-am65-iot2050-spl.dtb \
+ k3-am6528-iot2050-basic.dtb \
+ k3-am6528-iot2050-basic-pg2.dtb \
+ k3-am6548-iot2050-advanced.dtb \
+ k3-am6548-iot2050-advanced-pg2.dtb
+dtb-$(CONFIG_SOC_K3_J721E) += k3-j721e-common-proc-board.dtb \
+ k3-j721e-r5-common-proc-board.dtb \
+ k3-j7200-common-proc-board.dtb \
+ k3-j7200-r5-common-proc-board.dtb \
+ k3-j721e-sk.dtb \
+ k3-j721e-r5-sk.dtb
+dtb-$(CONFIG_SOC_K3_J721S2) += k3-j721s2-common-proc-board.dtb\
+ k3-j721s2-r5-common-proc-board.dtb
+dtb-$(CONFIG_SOC_K3_AM642) += k3-am642-evm.dtb \
+ k3-am642-r5-evm.dtb \
+ k3-am642-sk.dtb \
+ k3-am642-r5-sk.dtb
+
+dtb-$(CONFIG_SOC_K3_AM625) += k3-am625-sk.dtb \
+ k3-am625-r5-sk.dtb
+
+dtb-$(CONFIG_ARCH_MEDIATEK) += \
+ mt7622-rfb.dtb \
+ mt7623a-unielec-u7623-02-emmc.dtb \
+ mt7622-bananapi-bpi-r64.dtb \
+ mt7623n-bananapi-bpi-r2.dtb \
+ mt7629-rfb.dtb \
+ mt8183-pumpkin.dtb \
+ mt8512-bm1-emmc.dtb \
+ mt8516-pumpkin.dtb \
+ mt8518-ap1-emmc.dtb
+
+dtb-$(CONFIG_ARCH_NPCM7xx) += nuvoton-npcm750-evb.dtb
+dtb-$(CONFIG_XEN) += xenguest-arm64.dtb
+
+dtb-$(CONFIG_ARCH_OCTEONTX) += octeontx.dtb
+dtb-$(CONFIG_ARCH_OCTEONTX2) += octeontx.dtb
+
+dtb-$(CONFIG_TARGET_GE_BX50V3) += \
+ imx6q-bx50v3.dtb \
+ imx6q-b850v3.dtb \
+ imx6q-b650v3.dtb \
+ imx6q-b450v3.dtb
+
+dtb-$(CONFIG_TARGET_GE_B1X5V2) += imx6dl-b1x5v2.dtb
+dtb-$(CONFIG_TARGET_MX53PPD) += imx53-ppd.dtb
+
+# TODO(Linus Walleij <linus.walleij@linaro.org>): Should us a single vexpress
+# Kconfig option to build all of these. See examples above.
+dtb-$(CONFIG_TARGET_VEXPRESS_CA9X4) += vexpress-v2p-ca9.dtb
+dtb-$(CONFIG_TARGET_VEXPRESS64_BASE_FVP) += fvp-base-revc.dtb
+dtb-$(CONFIG_TARGET_VEXPRESS64_BASER_FVP) += arm_fvp.dtb
+dtb-$(CONFIG_TARGET_VEXPRESS64_JUNO) += juno-r2.dtb
+
+dtb-$(CONFIG_TARGET_TOTAL_COMPUTE) += total_compute.dtb
+
+dtb-$(CONFIG_TARGET_DURIAN) += phytium-durian.dtb
+dtb-$(CONFIG_TARGET_POMELO) += phytium-pomelo.dtb
+
+dtb-$(CONFIG_TARGET_PRESIDIO_ASIC) += ca-presidio-engboard.dtb
+
+dtb-$(CONFIG_TARGET_GXP) += hpe-bmc-dl360gen10.dts
+
+dtb-$(CONFIG_TARGET_IMX8MM_CL_IOT_GATE) += imx8mm-cl-iot-gate.dtb \
+ imx8mm-cl-iot-gate-ied.dtbo \
+ imx8mm-cl-iot-gate-ied-adc0.dtbo \
+ imx8mm-cl-iot-gate-ied-adc1.dtbo \
+ imx8mm-cl-iot-gate-ied-can0.dtbo \
+ imx8mm-cl-iot-gate-ied-can1.dtbo \
+ imx8mm-cl-iot-gate-ied-tpm0.dtbo \
+ imx8mm-cl-iot-gate-ied-tpm1.dtbo
+
+dtb-$(CONFIG_TARGET_IMX8MM_CL_IOT_GATE_OPTEE) += imx8mm-cl-iot-gate-optee.dtb \
+ imx8mm-cl-iot-gate-ied.dtbo \
+ imx8mm-cl-iot-gate-ied-adc0.dtbo \
+ imx8mm-cl-iot-gate-ied-adc1.dtbo \
+ imx8mm-cl-iot-gate-ied-can0.dtbo \
+ imx8mm-cl-iot-gate-ied-can1.dtbo \
+ imx8mm-cl-iot-gate-ied-tpm0.dtbo \
+ imx8mm-cl-iot-gate-ied-tpm1.dtbo
+
+ifneq ($(CONFIG_TARGET_IMX8MP_RSB3720A1_4G)$(CONFIG_TARGET_IMX8MP_RSB3720A1_6G),)
+dtb-y += imx8mp-rsb3720-a1.dtb
+endif
+
+dtb-$(CONFIG_TARGET_EA_LPC3250DEVKITV2) += lpc3250-ea3250.dtb
+
+dtb-$(CONFIG_ARCH_QEMU) += qemu-arm.dtb qemu-arm64.dtb
+
+dtb-$(CONFIG_TARGET_CORSTONE1000) += corstone1000-mps3.dtb \
+ corstone1000-fvp.dtb
+
+include $(srctree)/scripts/Makefile.dts
+
+targets += $(dtb-y)
+
+# Add any required device tree compiler flags here
+DTC_FLAGS += -a 0x8
+
+PHONY += dtbs
+dtbs: $(addprefix $(obj)/, $(dtb-y))
+ @:
+
+clean-files := *.dtb *.dtbo *_HS
Index: create-2022.10-repka-pi3-patch/u-boot-2022.10-new/arch/arm/dts/sun50i-h5-cpu-opp-1.0ghz.dtsi
===================================================================
--- create-2022.10-repka-pi3-patch/u-boot-2022.10-new/arch/arm/dts/sun50i-h5-cpu-opp-1.0ghz.dtsi (nonexistent)
+++ create-2022.10-repka-pi3-patch/u-boot-2022.10-new/arch/arm/dts/sun50i-h5-cpu-opp-1.0ghz.dtsi (revision 146)
@@ -0,0 +1,74 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+// Copyright (C) 2020 Chen-Yu Tsai <wens@csie.org>
+
+/ {
+ cpu_opp_table: opp-table-cpu {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp-288000000 {
+ opp-hz = /bits/ 64 <288000000>;
+ opp-microvolt = <1040000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-336000000 {
+ opp-hz = /bits/ 64 <336000000>;
+ opp-microvolt = <1040000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-480000000 {
+ opp-hz = /bits/ 64 <480000000>;
+ opp-microvolt = <1040000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-576000000 {
+ opp-hz = /bits/ 64 <576000000>;
+ opp-microvolt = <1040000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-648000000 {
+ opp-hz = /bits/ 64 <648000000>;
+ opp-microvolt = <1040000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-816000000 {
+ opp-hz = /bits/ 64 <816000000>;
+ opp-microvolt = <1100000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-912000000 {
+ opp-hz = /bits/ 64 <912000000>;
+ opp-microvolt = <1200000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1008000000 {
+ opp-hz = /bits/ 64 <1008000000>;
+ opp-microvolt = <1260000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ };
+};
+
+&cpu0 {
+ operating-points-v2 = <&cpu_opp_table>;
+};
+
+&cpu1 {
+ operating-points-v2 = <&cpu_opp_table>;
+};
+
+&cpu2 {
+ operating-points-v2 = <&cpu_opp_table>;
+};
+
+&cpu3 {
+ operating-points-v2 = <&cpu_opp_table>;
+};
Index: create-2022.10-repka-pi3-patch/u-boot-2022.10-new/arch/arm/dts/sun50i-h5-cpu-opp-1.2ghz.dtsi
===================================================================
--- create-2022.10-repka-pi3-patch/u-boot-2022.10-new/arch/arm/dts/sun50i-h5-cpu-opp-1.2ghz.dtsi (nonexistent)
+++ create-2022.10-repka-pi3-patch/u-boot-2022.10-new/arch/arm/dts/sun50i-h5-cpu-opp-1.2ghz.dtsi (revision 146)
@@ -0,0 +1,73 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+// Copyright (C) 2020 Chen-Yu Tsai <wens@csie.org>
+
+/ {
+ cpu_opp_table: opp-table-cpu {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp-288000000 {
+ opp-hz = /bits/ 64 <288000000>;
+ opp-microvolt = <1000000 1000000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-336000000 {
+ opp-hz = /bits/ 64 <336000000>;
+ opp-microvolt = <1040000 1040000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-480000000 {
+ opp-hz = /bits/ 64 <480000000>;
+ opp-microvolt = <1040000 1040000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-648000000 {
+ opp-hz = /bits/ 64 <648000000>;
+ opp-microvolt = <1040000 1040000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-816000000 {
+ opp-hz = /bits/ 64 <816000000>;
+ opp-microvolt = <1100000 1100000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1008000000 {
+ opp-hz = /bits/ 64 <1008000000>;
+ opp-microvolt = <1260000 1260000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-10560000000 {
+ opp-hz = /bits/ 64 <1056000000>;
+ opp-microvolt = <1260000 1260000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1200000000 {
+ opp-hz = /bits/ 64 <1200000000>;
+ opp-microvolt = <1320000 1320000 1320000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+ };
+};
+
+&cpu0 {
+ operating-points-v2 = <&cpu_opp_table>;
+};
+
+&cpu1 {
+ operating-points-v2 = <&cpu_opp_table>;
+};
+
+&cpu2 {
+ operating-points-v2 = <&cpu_opp_table>;
+};
+
+&cpu3 {
+ operating-points-v2 = <&cpu_opp_table>;
+};
Index: create-2022.10-repka-pi3-patch/u-boot-2022.10-new/arch/arm/dts/sun50i-h5-cpu-opp-1.4ghz.dtsi
===================================================================
--- create-2022.10-repka-pi3-patch/u-boot-2022.10-new/arch/arm/dts/sun50i-h5-cpu-opp-1.4ghz.dtsi (nonexistent)
+++ create-2022.10-repka-pi3-patch/u-boot-2022.10-new/arch/arm/dts/sun50i-h5-cpu-opp-1.4ghz.dtsi (revision 146)
@@ -0,0 +1,73 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+// Copyright (C) 2020 Chen-Yu Tsai <wens@csie.org>
+
+/ {
+ cpu_opp_table: opp-table-cpu {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp-288000000 {
+ opp-hz = /bits/ 64 <288000000>;
+ opp-microvolt = <1000000 1000000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-336000000 {
+ opp-hz = /bits/ 64 <336000000>;
+ opp-microvolt = <1040000 1040000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-480000000 {
+ opp-hz = /bits/ 64 <480000000>;
+ opp-microvolt = <1040000 1040000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-648000000 {
+ opp-hz = /bits/ 64 <648000000>;
+ opp-microvolt = <1040000 1040000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-816000000 {
+ opp-hz = /bits/ 64 <816000000>;
+ opp-microvolt = <1100000 1100000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1008000000 {
+ opp-hz = /bits/ 64 <1008000000>;
+ opp-microvolt = <1260000 1260000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1200000000 {
+ opp-hz = /bits/ 64 <1200000000>;
+ opp-microvolt = <1320000 1320000 1320000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1368000000 {
+ opp-hz = /bits/ 64 <1368000000>;
+ opp-microvolt = <1360000 1360000 1360000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+ };
+};
+
+&cpu0 {
+ operating-points-v2 = <&cpu_opp_table>;
+};
+
+&cpu1 {
+ operating-points-v2 = <&cpu_opp_table>;
+};
+
+&cpu2 {
+ operating-points-v2 = <&cpu_opp_table>;
+};
+
+&cpu3 {
+ operating-points-v2 = <&cpu_opp_table>;
+};
Index: create-2022.10-repka-pi3-patch/u-boot-2022.10-new/arch/arm/dts/sun50i-h5-cpu-opp.dtsi
===================================================================
--- create-2022.10-repka-pi3-patch/u-boot-2022.10-new/arch/arm/dts/sun50i-h5-cpu-opp.dtsi (nonexistent)
+++ create-2022.10-repka-pi3-patch/u-boot-2022.10-new/arch/arm/dts/sun50i-h5-cpu-opp.dtsi (revision 146)
@@ -0,0 +1,73 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+// Copyright (C) 2020 Chen-Yu Tsai <wens@csie.org>
+
+/ {
+ cpu_opp_table: opp-table-cpu {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp-288000000 {
+ opp-hz = /bits/ 64 <288000000>;
+ opp-microvolt = <1000000 1000000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-336000000 {
+ opp-hz = /bits/ 64 <336000000>;
+ opp-microvolt = <1040000 1040000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-480000000 {
+ opp-hz = /bits/ 64 <480000000>;
+ opp-microvolt = <1040000 1040000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-648000000 {
+ opp-hz = /bits/ 64 <648000000>;
+ opp-microvolt = <1040000 1040000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-816000000 {
+ opp-hz = /bits/ 64 <816000000>;
+ opp-microvolt = <1100000 1100000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1008000000 {
+ opp-hz = /bits/ 64 <1008000000>;
+ opp-microvolt = <1200000 1200000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1200000000 {
+ opp-hz = /bits/ 64 <1200000000>;
+ opp-microvolt = <1320000 1320000 1320000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1368000000 {
+ opp-hz = /bits/ 64 <1368000000>;
+ opp-microvolt = <1360000 1360000 1360000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+ };
+};
+
+&cpu0 {
+ operating-points-v2 = <&cpu_opp_table>;
+};
+
+&cpu1 {
+ operating-points-v2 = <&cpu_opp_table>;
+};
+
+&cpu2 {
+ operating-points-v2 = <&cpu_opp_table>;
+};
+
+&cpu3 {
+ operating-points-v2 = <&cpu_opp_table>;
+};
Index: create-2022.10-repka-pi3-patch/u-boot-2022.10-new/arch/arm/dts/sun50i-h5-repka-pi3-1.0ghz.dts
===================================================================
--- create-2022.10-repka-pi3-patch/u-boot-2022.10-new/arch/arm/dts/sun50i-h5-repka-pi3-1.0ghz.dts (nonexistent)
+++ create-2022.10-repka-pi3-patch/u-boot-2022.10-new/arch/arm/dts/sun50i-h5-repka-pi3-1.0ghz.dts (revision 146)
@@ -0,0 +1,410 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+// Copyright (C) 2016 ARM Ltd.
+
+/dts-v1/;
+#include "sun50i-h5.dtsi"
+#include "sun50i-h5-cpu-opp-1.0ghz.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/sun4i-a10.h>
+
+/ {
+ model = "Repka-Pi3-H5";
+ repka-freq = "1.0 GHz";
+ repka-pinout = "1";
+ compatible = "xunlong,orangepi-pc2", "allwinner,sun50i-h5";
+
+ reg_vcc3v3: vcc3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ aliases {
+ ethernet0 = &emac;
+ serial0 = &uart0;
+ serial1 = &uart1;
+ spi0 = &spi0;
+ spi1 = &spi1;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
+ ext_osc32k: ext_osc32k_clk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <32768>;
+ clock-output-names = "ext_osc32k";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ status {
+ label = "rbs:red:status";
+ gpios = <&pio 0 20 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&r_pio 0 8 GPIO_ACTIVE_LOW>;
+ post-power-on-delay-ms = <200>;
+ };
+
+};
+
+&codec {
+ allwinner,audio-routing =
+ "Line Out", "LINEOUT",
+ "MIC1", "Mic",
+ "Mic", "MBIAS";
+ status = "okay";
+};
+
+&cpu0 {
+ cpu-supply = <®_dcdc2>;
+};
+
+&cpu1 {
+ cpu-supply = <®_dcdc2>;
+};
+
+&cpu2 {
+ cpu-supply = <®_dcdc2>;
+};
+
+&cpu3 {
+ cpu-supply = <®_dcdc2>;
+};
+
+&de {
+ status = "okay";
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+&ehci2 {
+ status = "okay";
+};
+
+&ehci3 {
+ status = "okay";
+};
+
+&emac {
+ phy-handle = <&int_mii_phy>;
+ phy-mode = "mii";
+ allwinner,leds-active-low;
+ status = "okay";
+};
+
+&hdmi {
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
+&ir {
+ pinctrl-names = "default";
+ pinctrl-0 = <&r_ir_rx_pin>;
+ status = "disabled";
+};
+
+&rtc {
+ clocks = <&ext_osc32k>;
+};
+
+&mmc0 {
+ vmmc-supply = <®_vcc3v3>;
+ bus-width = <4>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+ status = "okay";
+};
+
+&mmc1 {
+ vmmc-supply = <®_vcc3v3>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ bus-width = <4>;
+ non-removable;
+ status = "okay";
+
+ brcmf: wifi@1 {
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
+ interrupt-parent = <&r_pio>;
+ interrupts = <0 7 IRQ_TYPE_LEVEL_LOW>; /* PL7 */
+ interrupt-names = "host-wake";
+ };
+
+};
+
+&mmc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_8bit_pins>;
+ vmmc-supply = <®_vcc3v3>;
+ bus-width = <8>;
+ non-removable;
+ cap-mmc-hw-reset;
+ status = "disabled";
+};
+
+&ohci0 {
+ status = "okay";
+};
+
+&ohci1 {
+ status = "okay";
+};
+
+&ohci2 {
+ status = "okay";
+};
+
+&ohci3 {
+ status = "okay";
+};
+
+&i2c1 {
+ status = "disabled"; /* PA19,PA18 */
+};
+
+&i2c0 {
+ status = "disabled"; /* PA11, PA12 */
+};
+
+&r_i2c {
+ status = "okay";
+
+ axp22x: pmic@34 {
+ compatible = "x-powers,axp221";
+ reg = <0x34>;
+ interrupt-parent = <&r_intc>;
+ interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+ };
+};
+
+#include "axp22x.dtsi"
+
+&ac_power_supply {
+ status = "okay";
+};
+
+®_aldo2 { /* VCC-PG 1.8 */
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-pg";
+};
+
+®_aldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-pll-avcc";
+};
+
+®_dc1sw {
+ regulator-name = "vcc-phy";
+};
+
+®_dcdc1 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-3v3";
+};
+
+®_dcdc2 {
+ regulator-always-on;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1360000>;
+ regulator-name = "vdd-cpux-a";
+};
+
+®_dcdc3 {
+ regulator-always-on;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1360000>;
+ regulator-name = "vdd-cpux-b";
+};
+
+/* DCDC3 is polyphased with DCDC2 */
+
+/*
+ * The DRAM chips used by rbs-h5 boards are DDR3 -compatibl
+ *
+ */
+®_dcdc5 {
+ regulator-always-on;
+ regulator-min-microvolt = <1500000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-name = "vcc-dram";
+};
+
+®_dldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-1";
+};
+
+®_dldo2 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-2";
+};
+
+®_dldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-3";
+};
+
+®_dldo4 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-4";
+};
+ /* VCC-wifi-IO 1.8 */
+®_eldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-wifi-io-1";
+};
+
+®_eldo2 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-wifi-io-2";
+};
+
+®_eldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-wifi-io-3";
+};
+
+
+
+®_rtc_ldo {
+ regulator-name = "vcc-rtc";
+};
+
+&spi0 {
+ pinctrl-names = "default", "default";
+ pinctrl-1 = <&spi0_cs1>;
+ cs-gpios = <0>, <&pio 0 3 0>; /* PA3 */
+
+ status = "disabled";
+ spidev@0 {
+ compatible = "rohm,dh2228fv";
+ status = "okay";
+ reg = <0>;
+ spi-max-frequency = <1000000>;
+ };
+ spidev@1 {
+ compatible = "rohm,dh2228fv";
+ status = "okay";
+ reg = <1>;
+ spi-max-frequency = <1000000>;
+ };
+};
+
+&spi1 {
+ pinctrl-names = "default", "default";
+
+ status = "disabled";
+ spidev@0 {
+ compatible = "rohm,dh2228fv";
+ status = "okay";
+ reg = <0>;
+ spi-max-frequency = <1000000>;
+ };
+};
+
+&pio {
+ spi0_cs1: spi0_cs1 {
+ pins = "PA3";
+ function = "gpio_out";
+ output-high;
+ };
+};
+
+
+&r_pwm {
+ status = "disabled";
+};
+
+/* to debag serial */
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pa_pins>;
+ status = "okay";
+};
+
+/* to bt-wifi module */
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
+ uart-has-rtscts;
+ status = "okay";
+
+
+
+};
+
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2_pins>, <&uart2_rts_cts_pins>;
+ status = "disabled";
+};
+
+&r_uart {
+ pinctrl-names = "default";
+ pinctrl-0 = <&r_uart_pins>;
+ status = "disabled";
+};
+
+&usb_otg {
+ dr_mode = "host";
+ status = "okay";
+};
+
+&usbphy {
+ status = "okay";
+};
+
+
Index: create-2022.10-repka-pi3-patch/u-boot-2022.10-new/arch/arm/dts/sun50i-h5-repka-pi3-1.2ghz.dts
===================================================================
--- create-2022.10-repka-pi3-patch/u-boot-2022.10-new/arch/arm/dts/sun50i-h5-repka-pi3-1.2ghz.dts (nonexistent)
+++ create-2022.10-repka-pi3-patch/u-boot-2022.10-new/arch/arm/dts/sun50i-h5-repka-pi3-1.2ghz.dts (revision 146)
@@ -0,0 +1,410 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+// Copyright (C) 2016 ARM Ltd.
+
+/dts-v1/;
+#include "sun50i-h5.dtsi"
+#include "sun50i-h5-cpu-opp-1.2ghz.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/sun4i-a10.h>
+
+/ {
+ model = "Repka-Pi3-H5";
+ repka-freq = "1.2 GHz";
+ repka-pinout = "1";
+ compatible = "xunlong,orangepi-pc2", "allwinner,sun50i-h5";
+
+ reg_vcc3v3: vcc3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ aliases {
+ ethernet0 = &emac;
+ serial0 = &uart0;
+ serial1 = &uart1;
+ spi0 = &spi0;
+ spi1 = &spi1;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
+ ext_osc32k: ext_osc32k_clk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <32768>;
+ clock-output-names = "ext_osc32k";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ status {
+ label = "rbs:red:status";
+ gpios = <&pio 0 20 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&r_pio 0 8 GPIO_ACTIVE_LOW>;
+ post-power-on-delay-ms = <200>;
+ };
+
+};
+
+&codec {
+ allwinner,audio-routing =
+ "Line Out", "LINEOUT",
+ "MIC1", "Mic",
+ "Mic", "MBIAS";
+ status = "okay";
+};
+
+&cpu0 {
+ cpu-supply = <®_dcdc2>;
+};
+
+&cpu1 {
+ cpu-supply = <®_dcdc2>;
+};
+
+&cpu2 {
+ cpu-supply = <®_dcdc2>;
+};
+
+&cpu3 {
+ cpu-supply = <®_dcdc2>;
+};
+
+&de {
+ status = "okay";
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+&ehci2 {
+ status = "okay";
+};
+
+&ehci3 {
+ status = "okay";
+};
+
+&emac {
+ phy-handle = <&int_mii_phy>;
+ phy-mode = "mii";
+ allwinner,leds-active-low;
+ status = "okay";
+};
+
+&hdmi {
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
+&ir {
+ pinctrl-names = "default";
+ pinctrl-0 = <&r_ir_rx_pin>;
+ status = "disabled";
+};
+
+&rtc {
+ clocks = <&ext_osc32k>;
+};
+
+&mmc0 {
+ vmmc-supply = <®_vcc3v3>;
+ bus-width = <4>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+ status = "okay";
+};
+
+&mmc1 {
+ vmmc-supply = <®_vcc3v3>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ bus-width = <4>;
+ non-removable;
+ status = "okay";
+
+ brcmf: wifi@1 {
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
+ interrupt-parent = <&r_pio>;
+ interrupts = <0 7 IRQ_TYPE_LEVEL_LOW>; /* PL7 */
+ interrupt-names = "host-wake";
+ };
+
+};
+
+&mmc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_8bit_pins>;
+ vmmc-supply = <®_vcc3v3>;
+ bus-width = <8>;
+ non-removable;
+ cap-mmc-hw-reset;
+ status = "disabled";
+};
+
+&ohci0 {
+ status = "okay";
+};
+
+&ohci1 {
+ status = "okay";
+};
+
+&ohci2 {
+ status = "okay";
+};
+
+&ohci3 {
+ status = "okay";
+};
+
+&i2c1 {
+ status = "disabled"; /* PA19,PA18 */
+};
+
+&i2c0 {
+ status = "disabled"; /* PA11, PA12 */
+};
+
+&r_i2c {
+ status = "okay";
+
+ axp22x: pmic@34 {
+ compatible = "x-powers,axp221";
+ reg = <0x34>;
+ interrupt-parent = <&r_intc>;
+ interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+ };
+};
+
+#include "axp22x.dtsi"
+
+&ac_power_supply {
+ status = "okay";
+};
+
+®_aldo2 { /* VCC-PG 1.8 */
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-pg";
+};
+
+®_aldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-pll-avcc";
+};
+
+®_dc1sw {
+ regulator-name = "vcc-phy";
+};
+
+®_dcdc1 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-3v3";
+};
+
+®_dcdc2 {
+ regulator-always-on;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1360000>;
+ regulator-name = "vdd-cpux-a";
+};
+
+®_dcdc3 {
+ regulator-always-on;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1360000>;
+ regulator-name = "vdd-cpux-b";
+};
+
+/* DCDC3 is polyphased with DCDC2 */
+
+/*
+ * The DRAM chips used by rbs-h5 boards are DDR3 -compatibl
+ *
+ */
+®_dcdc5 {
+ regulator-always-on;
+ regulator-min-microvolt = <1500000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-name = "vcc-dram";
+};
+
+®_dldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-1";
+};
+
+®_dldo2 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-2";
+};
+
+®_dldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-3";
+};
+
+®_dldo4 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-4";
+};
+ /* VCC-wifi-IO 1.8 */
+®_eldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-wifi-io-1";
+};
+
+®_eldo2 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-wifi-io-2";
+};
+
+®_eldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-wifi-io-3";
+};
+
+
+
+®_rtc_ldo {
+ regulator-name = "vcc-rtc";
+};
+
+&spi0 {
+ pinctrl-names = "default", "default";
+ pinctrl-1 = <&spi0_cs1>;
+ cs-gpios = <0>, <&pio 0 3 0>; /* PA3 */
+
+ status = "disabled";
+ spidev@0 {
+ compatible = "rohm,dh2228fv";
+ status = "okay";
+ reg = <0>;
+ spi-max-frequency = <1000000>;
+ };
+ spidev@1 {
+ compatible = "rohm,dh2228fv";
+ status = "okay";
+ reg = <1>;
+ spi-max-frequency = <1000000>;
+ };
+};
+
+&spi1 {
+ pinctrl-names = "default", "default";
+
+ status = "disabled";
+ spidev@0 {
+ compatible = "rohm,dh2228fv";
+ status = "okay";
+ reg = <0>;
+ spi-max-frequency = <1000000>;
+ };
+};
+
+&pio {
+ spi0_cs1: spi0_cs1 {
+ pins = "PA3";
+ function = "gpio_out";
+ output-high;
+ };
+};
+
+
+&r_pwm {
+ status = "disabled";
+};
+
+/* to debag serial */
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pa_pins>;
+ status = "okay";
+};
+
+/* to bt-wifi module */
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
+ uart-has-rtscts;
+ status = "okay";
+
+
+
+};
+
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2_pins>, <&uart2_rts_cts_pins>;
+ status = "disabled";
+};
+
+&r_uart {
+ pinctrl-names = "default";
+ pinctrl-0 = <&r_uart_pins>;
+ status = "disabled";
+};
+
+&usb_otg {
+ dr_mode = "host";
+ status = "okay";
+};
+
+&usbphy {
+ status = "okay";
+};
+
+
Index: create-2022.10-repka-pi3-patch/u-boot-2022.10-new/arch/arm/dts/sun50i-h5-repka-pi3-1.4ghz.dts
===================================================================
--- create-2022.10-repka-pi3-patch/u-boot-2022.10-new/arch/arm/dts/sun50i-h5-repka-pi3-1.4ghz.dts (nonexistent)
+++ create-2022.10-repka-pi3-patch/u-boot-2022.10-new/arch/arm/dts/sun50i-h5-repka-pi3-1.4ghz.dts (revision 146)
@@ -0,0 +1,410 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+// Copyright (C) 2016 ARM Ltd.
+
+/dts-v1/;
+#include "sun50i-h5.dtsi"
+#include "sun50i-h5-cpu-opp-1.4ghz.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/sun4i-a10.h>
+
+/ {
+ model = "Repka-Pi3-H5";
+ repka-freq = "1.4 GHz";
+ repka-pinout = "1";
+ compatible = "xunlong,orangepi-pc2", "allwinner,sun50i-h5";
+
+ reg_vcc3v3: vcc3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ aliases {
+ ethernet0 = &emac;
+ serial0 = &uart0;
+ serial1 = &uart1;
+ spi0 = &spi0;
+ spi1 = &spi1;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
+ ext_osc32k: ext_osc32k_clk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <32768>;
+ clock-output-names = "ext_osc32k";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ status {
+ label = "rbs:red:status";
+ gpios = <&pio 0 20 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&r_pio 0 8 GPIO_ACTIVE_LOW>;
+ post-power-on-delay-ms = <200>;
+ };
+
+};
+
+&codec {
+ allwinner,audio-routing =
+ "Line Out", "LINEOUT",
+ "MIC1", "Mic",
+ "Mic", "MBIAS";
+ status = "okay";
+};
+
+&cpu0 {
+ cpu-supply = <®_dcdc2>;
+};
+
+&cpu1 {
+ cpu-supply = <®_dcdc2>;
+};
+
+&cpu2 {
+ cpu-supply = <®_dcdc2>;
+};
+
+&cpu3 {
+ cpu-supply = <®_dcdc2>;
+};
+
+&de {
+ status = "okay";
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+&ehci2 {
+ status = "okay";
+};
+
+&ehci3 {
+ status = "okay";
+};
+
+&emac {
+ phy-handle = <&int_mii_phy>;
+ phy-mode = "mii";
+ allwinner,leds-active-low;
+ status = "okay";
+};
+
+&hdmi {
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
+&ir {
+ pinctrl-names = "default";
+ pinctrl-0 = <&r_ir_rx_pin>;
+ status = "disabled";
+};
+
+&rtc {
+ clocks = <&ext_osc32k>;
+};
+
+&mmc0 {
+ vmmc-supply = <®_vcc3v3>;
+ bus-width = <4>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+ status = "okay";
+};
+
+&mmc1 {
+ vmmc-supply = <®_vcc3v3>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ bus-width = <4>;
+ non-removable;
+ status = "okay";
+
+ brcmf: wifi@1 {
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
+ interrupt-parent = <&r_pio>;
+ interrupts = <0 7 IRQ_TYPE_LEVEL_LOW>; /* PL7 */
+ interrupt-names = "host-wake";
+ };
+
+};
+
+&mmc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_8bit_pins>;
+ vmmc-supply = <®_vcc3v3>;
+ bus-width = <8>;
+ non-removable;
+ cap-mmc-hw-reset;
+ status = "disabled";
+};
+
+&ohci0 {
+ status = "okay";
+};
+
+&ohci1 {
+ status = "okay";
+};
+
+&ohci2 {
+ status = "okay";
+};
+
+&ohci3 {
+ status = "okay";
+};
+
+&i2c1 {
+ status = "disabled"; /* PA19,PA18 */
+};
+
+&i2c0 {
+ status = "disabled"; /* PA11, PA12 */
+};
+
+&r_i2c {
+ status = "okay";
+
+ axp22x: pmic@34 {
+ compatible = "x-powers,axp221";
+ reg = <0x34>;
+ interrupt-parent = <&r_intc>;
+ interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+ };
+};
+
+#include "axp22x.dtsi"
+
+&ac_power_supply {
+ status = "okay";
+};
+
+®_aldo2 { /* VCC-PG 1.8 */
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-pg";
+};
+
+®_aldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-pll-avcc";
+};
+
+®_dc1sw {
+ regulator-name = "vcc-phy";
+};
+
+®_dcdc1 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-3v3";
+};
+
+®_dcdc2 {
+ regulator-always-on;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1360000>;
+ regulator-name = "vdd-cpux-a";
+};
+
+®_dcdc3 {
+ regulator-always-on;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1360000>;
+ regulator-name = "vdd-cpux-b";
+};
+
+/* DCDC3 is polyphased with DCDC2 */
+
+/*
+ * The DRAM chips used by rbs-h5 boards are DDR3 -compatibl
+ *
+ */
+®_dcdc5 {
+ regulator-always-on;
+ regulator-min-microvolt = <1500000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-name = "vcc-dram";
+};
+
+®_dldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-1";
+};
+
+®_dldo2 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-2";
+};
+
+®_dldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-3";
+};
+
+®_dldo4 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-4";
+};
+ /* VCC-wifi-IO 1.8 */
+®_eldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-wifi-io-1";
+};
+
+®_eldo2 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-wifi-io-2";
+};
+
+®_eldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-wifi-io-3";
+};
+
+
+
+®_rtc_ldo {
+ regulator-name = "vcc-rtc";
+};
+
+&spi0 {
+ pinctrl-names = "default", "default";
+ pinctrl-1 = <&spi0_cs1>;
+ cs-gpios = <0>, <&pio 0 3 0>; /* PA3 */
+
+ status = "disabled";
+ spidev@0 {
+ compatible = "rohm,dh2228fv";
+ status = "okay";
+ reg = <0>;
+ spi-max-frequency = <1000000>;
+ };
+ spidev@1 {
+ compatible = "rohm,dh2228fv";
+ status = "okay";
+ reg = <1>;
+ spi-max-frequency = <1000000>;
+ };
+};
+
+&spi1 {
+ pinctrl-names = "default", "default";
+
+ status = "disabled";
+ spidev@0 {
+ compatible = "rohm,dh2228fv";
+ status = "okay";
+ reg = <0>;
+ spi-max-frequency = <1000000>;
+ };
+};
+
+&pio {
+ spi0_cs1: spi0_cs1 {
+ pins = "PA3";
+ function = "gpio_out";
+ output-high;
+ };
+};
+
+
+&r_pwm {
+ status = "disabled";
+};
+
+/* to debag serial */
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pa_pins>;
+ status = "okay";
+};
+
+/* to bt-wifi module */
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
+ uart-has-rtscts;
+ status = "okay";
+
+
+
+};
+
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2_pins>, <&uart2_rts_cts_pins>;
+ status = "disabled";
+};
+
+&r_uart {
+ pinctrl-names = "default";
+ pinctrl-0 = <&r_uart_pins>;
+ status = "disabled";
+};
+
+&usb_otg {
+ dr_mode = "host";
+ status = "okay";
+};
+
+&usbphy {
+ status = "okay";
+};
+
+
Index: create-2022.10-repka-pi3-patch/u-boot-2022.10-new/arch/arm/dts/sun50i-h5-repka-pi3-alt-1.0ghz.dts
===================================================================
--- create-2022.10-repka-pi3-patch/u-boot-2022.10-new/arch/arm/dts/sun50i-h5-repka-pi3-alt-1.0ghz.dts (nonexistent)
+++ create-2022.10-repka-pi3-patch/u-boot-2022.10-new/arch/arm/dts/sun50i-h5-repka-pi3-alt-1.0ghz.dts (revision 146)
@@ -0,0 +1,410 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+// Copyright (C) 2016 ARM Ltd.
+
+/dts-v1/;
+#include "sun50i-h5.dtsi"
+#include "sun50i-h5-cpu-opp-1.0ghz.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/sun4i-a10.h>
+
+/ {
+ model = "Repka-Pi3-H5";
+ repka-freq = "1.0 GHz";
+ repka-pinout = "2";
+ compatible = "xunlong,orangepi-pc2", "allwinner,sun50i-h5";
+
+ reg_vcc3v3: vcc3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ aliases {
+ ethernet0 = &emac;
+ serial0 = &uart0;
+ serial1 = &uart1;
+ spi0 = &spi0;
+ spi1 = &spi1;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
+ ext_osc32k: ext_osc32k_clk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <32768>;
+ clock-output-names = "ext_osc32k";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ status {
+ label = "rbs:red:status";
+ gpios = <&pio 0 20 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&r_pio 0 8 GPIO_ACTIVE_LOW>;
+ post-power-on-delay-ms = <200>;
+ };
+
+};
+
+&codec {
+ allwinner,audio-routing =
+ "Line Out", "LINEOUT",
+ "MIC1", "Mic",
+ "Mic", "MBIAS";
+ status = "okay";
+};
+
+&cpu0 {
+ cpu-supply = <®_dcdc2>;
+};
+
+&cpu1 {
+ cpu-supply = <®_dcdc2>;
+};
+
+&cpu2 {
+ cpu-supply = <®_dcdc2>;
+};
+
+&cpu3 {
+ cpu-supply = <®_dcdc2>;
+};
+
+&de {
+ status = "okay";
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+&ehci2 {
+ status = "okay";
+};
+
+&ehci3 {
+ status = "okay";
+};
+
+&emac {
+ phy-handle = <&int_mii_phy>;
+ phy-mode = "mii";
+ allwinner,leds-active-low;
+ status = "okay";
+};
+
+&hdmi {
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
+&ir {
+ pinctrl-names = "default";
+ pinctrl-0 = <&r_ir_rx_pin>;
+ status = "disabled";
+};
+
+&rtc {
+ clocks = <&ext_osc32k>;
+};
+
+&mmc0 {
+ vmmc-supply = <®_vcc3v3>;
+ bus-width = <4>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+ status = "okay";
+};
+
+&mmc1 {
+ vmmc-supply = <®_vcc3v3>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ bus-width = <4>;
+ non-removable;
+ status = "okay";
+
+ brcmf: wifi@1 {
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
+ interrupt-parent = <&r_pio>;
+ interrupts = <0 7 IRQ_TYPE_LEVEL_LOW>; /* PL7 */
+ interrupt-names = "host-wake";
+ };
+
+};
+
+&mmc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_8bit_pins>;
+ vmmc-supply = <®_vcc3v3>;
+ bus-width = <8>;
+ non-removable;
+ cap-mmc-hw-reset;
+ status = "disabled";
+};
+
+&ohci0 {
+ status = "okay";
+};
+
+&ohci1 {
+ status = "okay";
+};
+
+&ohci2 {
+ status = "okay";
+};
+
+&ohci3 {
+ status = "okay";
+};
+
+&i2c1 {
+ status = "disabled"; /* PA19,PA18 */
+};
+
+&i2c0 {
+ status = "okay"; /* PA11, PA12 */
+};
+
+&r_i2c {
+ status = "okay";
+
+ axp22x: pmic@34 {
+ compatible = "x-powers,axp221";
+ reg = <0x34>;
+ interrupt-parent = <&r_intc>;
+ interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+ };
+};
+
+#include "axp22x.dtsi"
+
+&ac_power_supply {
+ status = "okay";
+};
+
+®_aldo2 { /* VCC-PG 1.8 */
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-pg";
+};
+
+®_aldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-pll-avcc";
+};
+
+®_dc1sw {
+ regulator-name = "vcc-phy";
+};
+
+®_dcdc1 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-3v3";
+};
+
+®_dcdc2 {
+ regulator-always-on;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1360000>;
+ regulator-name = "vdd-cpux-a";
+};
+
+®_dcdc3 {
+ regulator-always-on;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1360000>;
+ regulator-name = "vdd-cpux-b";
+};
+
+/* DCDC3 is polyphased with DCDC2 */
+
+/*
+ * The DRAM chips used by rbs-h5 boards are DDR3 -compatibl
+ *
+ */
+®_dcdc5 {
+ regulator-always-on;
+ regulator-min-microvolt = <1500000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-name = "vcc-dram";
+};
+
+®_dldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-1";
+};
+
+®_dldo2 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-2";
+};
+
+®_dldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-3";
+};
+
+®_dldo4 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-4";
+};
+ /* VCC-wifi-IO 1.8 */
+®_eldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-wifi-io-1";
+};
+
+®_eldo2 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-wifi-io-2";
+};
+
+®_eldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-wifi-io-3";
+};
+
+
+
+®_rtc_ldo {
+ regulator-name = "vcc-rtc";
+};
+
+&spi0 {
+ pinctrl-names = "default", "default";
+ pinctrl-1 = <&spi0_cs1>;
+ cs-gpios = <0>, <&pio 0 3 0>; /* PA3 */
+
+ status = "okay";
+ spidev@0 {
+ compatible = "rohm,dh2228fv";
+ status = "okay";
+ reg = <0>;
+ spi-max-frequency = <1000000>;
+ };
+ spidev@1 {
+ compatible = "rohm,dh2228fv";
+ status = "okay";
+ reg = <1>;
+ spi-max-frequency = <1000000>;
+ };
+};
+
+&spi1 {
+ pinctrl-names = "default", "default";
+
+ status = "okay";
+ spidev@0 {
+ compatible = "rohm,dh2228fv";
+ status = "okay";
+ reg = <0>;
+ spi-max-frequency = <1000000>;
+ };
+};
+
+&pio {
+ spi0_cs1: spi0_cs1 {
+ pins = "PA3";
+ function = "gpio_out";
+ output-high;
+ };
+};
+
+
+&r_pwm {
+ status = "disabled";
+};
+
+/* to debag serial */
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pa_pins>;
+ status = "okay";
+};
+
+/* to bt-wifi module */
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
+ uart-has-rtscts;
+ status = "okay";
+
+
+
+};
+
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2_pins>, <&uart2_rts_cts_pins>;
+ status = "disabled";
+};
+
+&r_uart {
+ pinctrl-names = "default";
+ pinctrl-0 = <&r_uart_pins>;
+ status = "disabled";
+};
+
+&usb_otg {
+ dr_mode = "host";
+ status = "okay";
+};
+
+&usbphy {
+ status = "okay";
+};
+
+
Index: create-2022.10-repka-pi3-patch/u-boot-2022.10-new/arch/arm/dts/sun50i-h5-repka-pi3-alt-1.2ghz.dts
===================================================================
--- create-2022.10-repka-pi3-patch/u-boot-2022.10-new/arch/arm/dts/sun50i-h5-repka-pi3-alt-1.2ghz.dts (nonexistent)
+++ create-2022.10-repka-pi3-patch/u-boot-2022.10-new/arch/arm/dts/sun50i-h5-repka-pi3-alt-1.2ghz.dts (revision 146)
@@ -0,0 +1,410 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+// Copyright (C) 2016 ARM Ltd.
+
+/dts-v1/;
+#include "sun50i-h5.dtsi"
+#include "sun50i-h5-cpu-opp-1.2ghz.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/sun4i-a10.h>
+
+/ {
+ model = "Repka-Pi3-H5";
+ repka-freq = "1.2 GHz";
+ repka-pinout = "2";
+ compatible = "xunlong,orangepi-pc2", "allwinner,sun50i-h5";
+
+ reg_vcc3v3: vcc3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ aliases {
+ ethernet0 = &emac;
+ serial0 = &uart0;
+ serial1 = &uart1;
+ spi0 = &spi0;
+ spi1 = &spi1;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
+ ext_osc32k: ext_osc32k_clk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <32768>;
+ clock-output-names = "ext_osc32k";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ status {
+ label = "rbs:red:status";
+ gpios = <&pio 0 20 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&r_pio 0 8 GPIO_ACTIVE_LOW>;
+ post-power-on-delay-ms = <200>;
+ };
+
+};
+
+&codec {
+ allwinner,audio-routing =
+ "Line Out", "LINEOUT",
+ "MIC1", "Mic",
+ "Mic", "MBIAS";
+ status = "okay";
+};
+
+&cpu0 {
+ cpu-supply = <®_dcdc2>;
+};
+
+&cpu1 {
+ cpu-supply = <®_dcdc2>;
+};
+
+&cpu2 {
+ cpu-supply = <®_dcdc2>;
+};
+
+&cpu3 {
+ cpu-supply = <®_dcdc2>;
+};
+
+&de {
+ status = "okay";
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+&ehci2 {
+ status = "okay";
+};
+
+&ehci3 {
+ status = "okay";
+};
+
+&emac {
+ phy-handle = <&int_mii_phy>;
+ phy-mode = "mii";
+ allwinner,leds-active-low;
+ status = "okay";
+};
+
+&hdmi {
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
+&ir {
+ pinctrl-names = "default";
+ pinctrl-0 = <&r_ir_rx_pin>;
+ status = "disabled";
+};
+
+&rtc {
+ clocks = <&ext_osc32k>;
+};
+
+&mmc0 {
+ vmmc-supply = <®_vcc3v3>;
+ bus-width = <4>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+ status = "okay";
+};
+
+&mmc1 {
+ vmmc-supply = <®_vcc3v3>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ bus-width = <4>;
+ non-removable;
+ status = "okay";
+
+ brcmf: wifi@1 {
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
+ interrupt-parent = <&r_pio>;
+ interrupts = <0 7 IRQ_TYPE_LEVEL_LOW>; /* PL7 */
+ interrupt-names = "host-wake";
+ };
+
+};
+
+&mmc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_8bit_pins>;
+ vmmc-supply = <®_vcc3v3>;
+ bus-width = <8>;
+ non-removable;
+ cap-mmc-hw-reset;
+ status = "disabled";
+};
+
+&ohci0 {
+ status = "okay";
+};
+
+&ohci1 {
+ status = "okay";
+};
+
+&ohci2 {
+ status = "okay";
+};
+
+&ohci3 {
+ status = "okay";
+};
+
+&i2c1 {
+ status = "disabled"; /* PA19,PA18 */
+};
+
+&i2c0 {
+ status = "okay"; /* PA11, PA12 */
+};
+
+&r_i2c {
+ status = "okay";
+
+ axp22x: pmic@34 {
+ compatible = "x-powers,axp221";
+ reg = <0x34>;
+ interrupt-parent = <&r_intc>;
+ interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+ };
+};
+
+#include "axp22x.dtsi"
+
+&ac_power_supply {
+ status = "okay";
+};
+
+®_aldo2 { /* VCC-PG 1.8 */
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-pg";
+};
+
+®_aldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-pll-avcc";
+};
+
+®_dc1sw {
+ regulator-name = "vcc-phy";
+};
+
+®_dcdc1 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-3v3";
+};
+
+®_dcdc2 {
+ regulator-always-on;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1360000>;
+ regulator-name = "vdd-cpux-a";
+};
+
+®_dcdc3 {
+ regulator-always-on;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1360000>;
+ regulator-name = "vdd-cpux-b";
+};
+
+/* DCDC3 is polyphased with DCDC2 */
+
+/*
+ * The DRAM chips used by rbs-h5 boards are DDR3 -compatibl
+ *
+ */
+®_dcdc5 {
+ regulator-always-on;
+ regulator-min-microvolt = <1500000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-name = "vcc-dram";
+};
+
+®_dldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-1";
+};
+
+®_dldo2 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-2";
+};
+
+®_dldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-3";
+};
+
+®_dldo4 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-4";
+};
+ /* VCC-wifi-IO 1.8 */
+®_eldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-wifi-io-1";
+};
+
+®_eldo2 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-wifi-io-2";
+};
+
+®_eldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-wifi-io-3";
+};
+
+
+
+®_rtc_ldo {
+ regulator-name = "vcc-rtc";
+};
+
+&spi0 {
+ pinctrl-names = "default", "default";
+ pinctrl-1 = <&spi0_cs1>;
+ cs-gpios = <0>, <&pio 0 3 0>; /* PA3 */
+
+ status = "okay";
+ spidev@0 {
+ compatible = "rohm,dh2228fv";
+ status = "okay";
+ reg = <0>;
+ spi-max-frequency = <1000000>;
+ };
+ spidev@1 {
+ compatible = "rohm,dh2228fv";
+ status = "okay";
+ reg = <1>;
+ spi-max-frequency = <1000000>;
+ };
+};
+
+&spi1 {
+ pinctrl-names = "default", "default";
+
+ status = "okay";
+ spidev@0 {
+ compatible = "rohm,dh2228fv";
+ status = "okay";
+ reg = <0>;
+ spi-max-frequency = <1000000>;
+ };
+};
+
+&pio {
+ spi0_cs1: spi0_cs1 {
+ pins = "PA3";
+ function = "gpio_out";
+ output-high;
+ };
+};
+
+
+&r_pwm {
+ status = "disabled";
+};
+
+/* to debag serial */
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pa_pins>;
+ status = "okay";
+};
+
+/* to bt-wifi module */
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
+ uart-has-rtscts;
+ status = "okay";
+
+
+
+};
+
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2_pins>, <&uart2_rts_cts_pins>;
+ status = "disabled";
+};
+
+&r_uart {
+ pinctrl-names = "default";
+ pinctrl-0 = <&r_uart_pins>;
+ status = "disabled";
+};
+
+&usb_otg {
+ dr_mode = "host";
+ status = "okay";
+};
+
+&usbphy {
+ status = "okay";
+};
+
+
Index: create-2022.10-repka-pi3-patch/u-boot-2022.10-new/arch/arm/dts/sun50i-h5-repka-pi3-alt-1.4ghz.dts
===================================================================
--- create-2022.10-repka-pi3-patch/u-boot-2022.10-new/arch/arm/dts/sun50i-h5-repka-pi3-alt-1.4ghz.dts (nonexistent)
+++ create-2022.10-repka-pi3-patch/u-boot-2022.10-new/arch/arm/dts/sun50i-h5-repka-pi3-alt-1.4ghz.dts (revision 146)
@@ -0,0 +1,410 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+// Copyright (C) 2016 ARM Ltd.
+
+/dts-v1/;
+#include "sun50i-h5.dtsi"
+#include "sun50i-h5-cpu-opp-1.4ghz.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/sun4i-a10.h>
+
+/ {
+ model = "Repka-Pi3-H5";
+ repka-freq = "1.4 GHz";
+ repka-pinout = "2";
+ compatible = "xunlong,orangepi-pc2", "allwinner,sun50i-h5";
+
+ reg_vcc3v3: vcc3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ aliases {
+ ethernet0 = &emac;
+ serial0 = &uart0;
+ serial1 = &uart1;
+ spi0 = &spi0;
+ spi1 = &spi1;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
+ ext_osc32k: ext_osc32k_clk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <32768>;
+ clock-output-names = "ext_osc32k";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ status {
+ label = "rbs:red:status";
+ gpios = <&pio 0 20 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&r_pio 0 8 GPIO_ACTIVE_LOW>;
+ post-power-on-delay-ms = <200>;
+ };
+
+};
+
+&codec {
+ allwinner,audio-routing =
+ "Line Out", "LINEOUT",
+ "MIC1", "Mic",
+ "Mic", "MBIAS";
+ status = "okay";
+};
+
+&cpu0 {
+ cpu-supply = <®_dcdc2>;
+};
+
+&cpu1 {
+ cpu-supply = <®_dcdc2>;
+};
+
+&cpu2 {
+ cpu-supply = <®_dcdc2>;
+};
+
+&cpu3 {
+ cpu-supply = <®_dcdc2>;
+};
+
+&de {
+ status = "okay";
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+&ehci2 {
+ status = "okay";
+};
+
+&ehci3 {
+ status = "okay";
+};
+
+&emac {
+ phy-handle = <&int_mii_phy>;
+ phy-mode = "mii";
+ allwinner,leds-active-low;
+ status = "okay";
+};
+
+&hdmi {
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
+&ir {
+ pinctrl-names = "default";
+ pinctrl-0 = <&r_ir_rx_pin>;
+ status = "disabled";
+};
+
+&rtc {
+ clocks = <&ext_osc32k>;
+};
+
+&mmc0 {
+ vmmc-supply = <®_vcc3v3>;
+ bus-width = <4>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+ status = "okay";
+};
+
+&mmc1 {
+ vmmc-supply = <®_vcc3v3>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ bus-width = <4>;
+ non-removable;
+ status = "okay";
+
+ brcmf: wifi@1 {
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
+ interrupt-parent = <&r_pio>;
+ interrupts = <0 7 IRQ_TYPE_LEVEL_LOW>; /* PL7 */
+ interrupt-names = "host-wake";
+ };
+
+};
+
+&mmc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_8bit_pins>;
+ vmmc-supply = <®_vcc3v3>;
+ bus-width = <8>;
+ non-removable;
+ cap-mmc-hw-reset;
+ status = "disabled";
+};
+
+&ohci0 {
+ status = "okay";
+};
+
+&ohci1 {
+ status = "okay";
+};
+
+&ohci2 {
+ status = "okay";
+};
+
+&ohci3 {
+ status = "okay";
+};
+
+&i2c1 {
+ status = "disabled"; /* PA19,PA18 */
+};
+
+&i2c0 {
+ status = "okay"; /* PA11, PA12 */
+};
+
+&r_i2c {
+ status = "okay";
+
+ axp22x: pmic@34 {
+ compatible = "x-powers,axp221";
+ reg = <0x34>;
+ interrupt-parent = <&r_intc>;
+ interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+ };
+};
+
+#include "axp22x.dtsi"
+
+&ac_power_supply {
+ status = "okay";
+};
+
+®_aldo2 { /* VCC-PG 1.8 */
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-pg";
+};
+
+®_aldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-pll-avcc";
+};
+
+®_dc1sw {
+ regulator-name = "vcc-phy";
+};
+
+®_dcdc1 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-3v3";
+};
+
+®_dcdc2 {
+ regulator-always-on;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1360000>;
+ regulator-name = "vdd-cpux-a";
+};
+
+®_dcdc3 {
+ regulator-always-on;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1360000>;
+ regulator-name = "vdd-cpux-b";
+};
+
+/* DCDC3 is polyphased with DCDC2 */
+
+/*
+ * The DRAM chips used by rbs-h5 boards are DDR3 -compatibl
+ *
+ */
+®_dcdc5 {
+ regulator-always-on;
+ regulator-min-microvolt = <1500000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-name = "vcc-dram";
+};
+
+®_dldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-1";
+};
+
+®_dldo2 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-2";
+};
+
+®_dldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-3";
+};
+
+®_dldo4 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-4";
+};
+ /* VCC-wifi-IO 1.8 */
+®_eldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-wifi-io-1";
+};
+
+®_eldo2 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-wifi-io-2";
+};
+
+®_eldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-wifi-io-3";
+};
+
+
+
+®_rtc_ldo {
+ regulator-name = "vcc-rtc";
+};
+
+&spi0 {
+ pinctrl-names = "default", "default";
+ pinctrl-1 = <&spi0_cs1>;
+ cs-gpios = <0>, <&pio 0 3 0>; /* PA3 */
+
+ status = "okay";
+ spidev@0 {
+ compatible = "rohm,dh2228fv";
+ status = "okay";
+ reg = <0>;
+ spi-max-frequency = <1000000>;
+ };
+ spidev@1 {
+ compatible = "rohm,dh2228fv";
+ status = "okay";
+ reg = <1>;
+ spi-max-frequency = <1000000>;
+ };
+};
+
+&spi1 {
+ pinctrl-names = "default", "default";
+
+ status = "okay";
+ spidev@0 {
+ compatible = "rohm,dh2228fv";
+ status = "okay";
+ reg = <0>;
+ spi-max-frequency = <1000000>;
+ };
+};
+
+&pio {
+ spi0_cs1: spi0_cs1 {
+ pins = "PA3";
+ function = "gpio_out";
+ output-high;
+ };
+};
+
+
+&r_pwm {
+ status = "disabled";
+};
+
+/* to debag serial */
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pa_pins>;
+ status = "okay";
+};
+
+/* to bt-wifi module */
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
+ uart-has-rtscts;
+ status = "okay";
+
+
+
+};
+
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2_pins>, <&uart2_rts_cts_pins>;
+ status = "disabled";
+};
+
+&r_uart {
+ pinctrl-names = "default";
+ pinctrl-0 = <&r_uart_pins>;
+ status = "disabled";
+};
+
+&usb_otg {
+ dr_mode = "host";
+ status = "okay";
+};
+
+&usbphy {
+ status = "okay";
+};
+
+
Index: create-2022.10-repka-pi3-patch/u-boot-2022.10-new/arch/arm/dts/sun50i-h5-repka-pi3-alt-i2c2-1.0ghz.dts
===================================================================
--- create-2022.10-repka-pi3-patch/u-boot-2022.10-new/arch/arm/dts/sun50i-h5-repka-pi3-alt-i2c2-1.0ghz.dts (nonexistent)
+++ create-2022.10-repka-pi3-patch/u-boot-2022.10-new/arch/arm/dts/sun50i-h5-repka-pi3-alt-i2c2-1.0ghz.dts (revision 146)
@@ -0,0 +1,410 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+// Copyright (C) 2016 ARM Ltd.
+
+/dts-v1/;
+#include "sun50i-h5.dtsi"
+#include "sun50i-h5-cpu-opp-1.0ghz.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/sun4i-a10.h>
+
+/ {
+ model = "Repka-Pi3-H5";
+ repka-freq = "1.0 GHz";
+ repka-pinout = "4";
+ compatible = "xunlong,orangepi-pc2", "allwinner,sun50i-h5";
+
+ reg_vcc3v3: vcc3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ aliases {
+ ethernet0 = &emac;
+ serial0 = &uart0;
+ serial1 = &uart1;
+ spi0 = &spi0;
+ spi1 = &spi1;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
+ ext_osc32k: ext_osc32k_clk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <32768>;
+ clock-output-names = "ext_osc32k";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ status {
+ label = "rbs:red:status";
+ gpios = <&pio 0 20 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&r_pio 0 8 GPIO_ACTIVE_LOW>;
+ post-power-on-delay-ms = <200>;
+ };
+
+};
+
+&codec {
+ allwinner,audio-routing =
+ "Line Out", "LINEOUT",
+ "MIC1", "Mic",
+ "Mic", "MBIAS";
+ status = "okay";
+};
+
+&cpu0 {
+ cpu-supply = <®_dcdc2>;
+};
+
+&cpu1 {
+ cpu-supply = <®_dcdc2>;
+};
+
+&cpu2 {
+ cpu-supply = <®_dcdc2>;
+};
+
+&cpu3 {
+ cpu-supply = <®_dcdc2>;
+};
+
+&de {
+ status = "okay";
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+&ehci2 {
+ status = "okay";
+};
+
+&ehci3 {
+ status = "okay";
+};
+
+&emac {
+ phy-handle = <&int_mii_phy>;
+ phy-mode = "mii";
+ allwinner,leds-active-low;
+ status = "okay";
+};
+
+&hdmi {
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
+&ir {
+ pinctrl-names = "default";
+ pinctrl-0 = <&r_ir_rx_pin>;
+ status = "disabled";
+};
+
+&rtc {
+ clocks = <&ext_osc32k>;
+};
+
+&mmc0 {
+ vmmc-supply = <®_vcc3v3>;
+ bus-width = <4>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+ status = "okay";
+};
+
+&mmc1 {
+ vmmc-supply = <®_vcc3v3>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ bus-width = <4>;
+ non-removable;
+ status = "okay";
+
+ brcmf: wifi@1 {
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
+ interrupt-parent = <&r_pio>;
+ interrupts = <0 7 IRQ_TYPE_LEVEL_LOW>; /* PL7 */
+ interrupt-names = "host-wake";
+ };
+
+};
+
+&mmc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_8bit_pins>;
+ vmmc-supply = <®_vcc3v3>;
+ bus-width = <8>;
+ non-removable;
+ cap-mmc-hw-reset;
+ status = "disabled";
+};
+
+&ohci0 {
+ status = "okay";
+};
+
+&ohci1 {
+ status = "okay";
+};
+
+&ohci2 {
+ status = "okay";
+};
+
+&ohci3 {
+ status = "okay";
+};
+
+&i2c1 {
+ status = "okay"; /* PA19,PA18 */
+};
+
+&i2c0 {
+ status = "okay"; /* PA11, PA12 */
+};
+
+&r_i2c {
+ status = "okay";
+
+ axp22x: pmic@34 {
+ compatible = "x-powers,axp221";
+ reg = <0x34>;
+ interrupt-parent = <&r_intc>;
+ interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+ };
+};
+
+#include "axp22x.dtsi"
+
+&ac_power_supply {
+ status = "okay";
+};
+
+®_aldo2 { /* VCC-PG 1.8 */
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-pg";
+};
+
+®_aldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-pll-avcc";
+};
+
+®_dc1sw {
+ regulator-name = "vcc-phy";
+};
+
+®_dcdc1 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-3v3";
+};
+
+®_dcdc2 {
+ regulator-always-on;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1360000>;
+ regulator-name = "vdd-cpux-a";
+};
+
+®_dcdc3 {
+ regulator-always-on;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1360000>;
+ regulator-name = "vdd-cpux-b";
+};
+
+/* DCDC3 is polyphased with DCDC2 */
+
+/*
+ * The DRAM chips used by rbs-h5 boards are DDR3 -compatibl
+ *
+ */
+®_dcdc5 {
+ regulator-always-on;
+ regulator-min-microvolt = <1500000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-name = "vcc-dram";
+};
+
+®_dldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-1";
+};
+
+®_dldo2 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-2";
+};
+
+®_dldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-3";
+};
+
+®_dldo4 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-4";
+};
+ /* VCC-wifi-IO 1.8 */
+®_eldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-wifi-io-1";
+};
+
+®_eldo2 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-wifi-io-2";
+};
+
+®_eldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-wifi-io-3";
+};
+
+
+
+®_rtc_ldo {
+ regulator-name = "vcc-rtc";
+};
+
+&spi0 {
+ pinctrl-names = "default", "default";
+ pinctrl-1 = <&spi0_cs1>;
+ cs-gpios = <0>, <&pio 0 3 0>; /* PA3 */
+
+ status = "okay";
+ spidev@0 {
+ compatible = "rohm,dh2228fv";
+ status = "okay";
+ reg = <0>;
+ spi-max-frequency = <1000000>;
+ };
+ spidev@1 {
+ compatible = "rohm,dh2228fv";
+ status = "okay";
+ reg = <1>;
+ spi-max-frequency = <1000000>;
+ };
+};
+
+&spi1 {
+ pinctrl-names = "default", "default";
+
+ status = "okay";
+ spidev@0 {
+ compatible = "rohm,dh2228fv";
+ status = "okay";
+ reg = <0>;
+ spi-max-frequency = <1000000>;
+ };
+};
+
+&pio {
+ spi0_cs1: spi0_cs1 {
+ pins = "PA3";
+ function = "gpio_out";
+ output-high;
+ };
+};
+
+
+&r_pwm {
+ status = "disabled";
+};
+
+/* to debag serial */
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pa_pins>;
+ status = "okay";
+};
+
+/* to bt-wifi module */
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
+ uart-has-rtscts;
+ status = "okay";
+
+
+
+};
+
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2_pins>, <&uart2_rts_cts_pins>;
+ status = "disabled";
+};
+
+&r_uart {
+ pinctrl-names = "default";
+ pinctrl-0 = <&r_uart_pins>;
+ status = "disabled";
+};
+
+&usb_otg {
+ dr_mode = "host";
+ status = "okay";
+};
+
+&usbphy {
+ status = "okay";
+};
+
+
Index: create-2022.10-repka-pi3-patch/u-boot-2022.10-new/arch/arm/dts/sun50i-h5-repka-pi3-alt-i2c2-1.2ghz.dts
===================================================================
--- create-2022.10-repka-pi3-patch/u-boot-2022.10-new/arch/arm/dts/sun50i-h5-repka-pi3-alt-i2c2-1.2ghz.dts (nonexistent)
+++ create-2022.10-repka-pi3-patch/u-boot-2022.10-new/arch/arm/dts/sun50i-h5-repka-pi3-alt-i2c2-1.2ghz.dts (revision 146)
@@ -0,0 +1,410 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+// Copyright (C) 2016 ARM Ltd.
+
+/dts-v1/;
+#include "sun50i-h5.dtsi"
+#include "sun50i-h5-cpu-opp-1.2ghz.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/sun4i-a10.h>
+
+/ {
+ model = "Repka-Pi3-H5";
+ repka-freq = "1.2 GHz";
+ repka-pinout = "4";
+ compatible = "xunlong,orangepi-pc2", "allwinner,sun50i-h5";
+
+ reg_vcc3v3: vcc3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ aliases {
+ ethernet0 = &emac;
+ serial0 = &uart0;
+ serial1 = &uart1;
+ spi0 = &spi0;
+ spi1 = &spi1;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
+ ext_osc32k: ext_osc32k_clk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <32768>;
+ clock-output-names = "ext_osc32k";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ status {
+ label = "rbs:red:status";
+ gpios = <&pio 0 20 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&r_pio 0 8 GPIO_ACTIVE_LOW>;
+ post-power-on-delay-ms = <200>;
+ };
+
+};
+
+&codec {
+ allwinner,audio-routing =
+ "Line Out", "LINEOUT",
+ "MIC1", "Mic",
+ "Mic", "MBIAS";
+ status = "okay";
+};
+
+&cpu0 {
+ cpu-supply = <®_dcdc2>;
+};
+
+&cpu1 {
+ cpu-supply = <®_dcdc2>;
+};
+
+&cpu2 {
+ cpu-supply = <®_dcdc2>;
+};
+
+&cpu3 {
+ cpu-supply = <®_dcdc2>;
+};
+
+&de {
+ status = "okay";
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+&ehci2 {
+ status = "okay";
+};
+
+&ehci3 {
+ status = "okay";
+};
+
+&emac {
+ phy-handle = <&int_mii_phy>;
+ phy-mode = "mii";
+ allwinner,leds-active-low;
+ status = "okay";
+};
+
+&hdmi {
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
+&ir {
+ pinctrl-names = "default";
+ pinctrl-0 = <&r_ir_rx_pin>;
+ status = "disabled";
+};
+
+&rtc {
+ clocks = <&ext_osc32k>;
+};
+
+&mmc0 {
+ vmmc-supply = <®_vcc3v3>;
+ bus-width = <4>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+ status = "okay";
+};
+
+&mmc1 {
+ vmmc-supply = <®_vcc3v3>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ bus-width = <4>;
+ non-removable;
+ status = "okay";
+
+ brcmf: wifi@1 {
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
+ interrupt-parent = <&r_pio>;
+ interrupts = <0 7 IRQ_TYPE_LEVEL_LOW>; /* PL7 */
+ interrupt-names = "host-wake";
+ };
+
+};
+
+&mmc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_8bit_pins>;
+ vmmc-supply = <®_vcc3v3>;
+ bus-width = <8>;
+ non-removable;
+ cap-mmc-hw-reset;
+ status = "disabled";
+};
+
+&ohci0 {
+ status = "okay";
+};
+
+&ohci1 {
+ status = "okay";
+};
+
+&ohci2 {
+ status = "okay";
+};
+
+&ohci3 {
+ status = "okay";
+};
+
+&i2c1 {
+ status = "okay"; /* PA19,PA18 */
+};
+
+&i2c0 {
+ status = "okay"; /* PA11, PA12 */
+};
+
+&r_i2c {
+ status = "okay";
+
+ axp22x: pmic@34 {
+ compatible = "x-powers,axp221";
+ reg = <0x34>;
+ interrupt-parent = <&r_intc>;
+ interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+ };
+};
+
+#include "axp22x.dtsi"
+
+&ac_power_supply {
+ status = "okay";
+};
+
+®_aldo2 { /* VCC-PG 1.8 */
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-pg";
+};
+
+®_aldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-pll-avcc";
+};
+
+®_dc1sw {
+ regulator-name = "vcc-phy";
+};
+
+®_dcdc1 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-3v3";
+};
+
+®_dcdc2 {
+ regulator-always-on;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1360000>;
+ regulator-name = "vdd-cpux-a";
+};
+
+®_dcdc3 {
+ regulator-always-on;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1360000>;
+ regulator-name = "vdd-cpux-b";
+};
+
+/* DCDC3 is polyphased with DCDC2 */
+
+/*
+ * The DRAM chips used by rbs-h5 boards are DDR3 -compatibl
+ *
+ */
+®_dcdc5 {
+ regulator-always-on;
+ regulator-min-microvolt = <1500000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-name = "vcc-dram";
+};
+
+®_dldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-1";
+};
+
+®_dldo2 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-2";
+};
+
+®_dldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-3";
+};
+
+®_dldo4 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-4";
+};
+ /* VCC-wifi-IO 1.8 */
+®_eldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-wifi-io-1";
+};
+
+®_eldo2 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-wifi-io-2";
+};
+
+®_eldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-wifi-io-3";
+};
+
+
+
+®_rtc_ldo {
+ regulator-name = "vcc-rtc";
+};
+
+&spi0 {
+ pinctrl-names = "default", "default";
+ pinctrl-1 = <&spi0_cs1>;
+ cs-gpios = <0>, <&pio 0 3 0>; /* PA3 */
+
+ status = "okay";
+ spidev@0 {
+ compatible = "rohm,dh2228fv";
+ status = "okay";
+ reg = <0>;
+ spi-max-frequency = <1000000>;
+ };
+ spidev@1 {
+ compatible = "rohm,dh2228fv";
+ status = "okay";
+ reg = <1>;
+ spi-max-frequency = <1000000>;
+ };
+};
+
+&spi1 {
+ pinctrl-names = "default", "default";
+
+ status = "okay";
+ spidev@0 {
+ compatible = "rohm,dh2228fv";
+ status = "okay";
+ reg = <0>;
+ spi-max-frequency = <1000000>;
+ };
+};
+
+&pio {
+ spi0_cs1: spi0_cs1 {
+ pins = "PA3";
+ function = "gpio_out";
+ output-high;
+ };
+};
+
+
+&r_pwm {
+ status = "disabled";
+};
+
+/* to debag serial */
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pa_pins>;
+ status = "okay";
+};
+
+/* to bt-wifi module */
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
+ uart-has-rtscts;
+ status = "okay";
+
+
+
+};
+
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2_pins>, <&uart2_rts_cts_pins>;
+ status = "disabled";
+};
+
+&r_uart {
+ pinctrl-names = "default";
+ pinctrl-0 = <&r_uart_pins>;
+ status = "disabled";
+};
+
+&usb_otg {
+ dr_mode = "host";
+ status = "okay";
+};
+
+&usbphy {
+ status = "okay";
+};
+
+
Index: create-2022.10-repka-pi3-patch/u-boot-2022.10-new/arch/arm/dts/sun50i-h5-repka-pi3-alt-i2c2-1.4ghz.dts
===================================================================
--- create-2022.10-repka-pi3-patch/u-boot-2022.10-new/arch/arm/dts/sun50i-h5-repka-pi3-alt-i2c2-1.4ghz.dts (nonexistent)
+++ create-2022.10-repka-pi3-patch/u-boot-2022.10-new/arch/arm/dts/sun50i-h5-repka-pi3-alt-i2c2-1.4ghz.dts (revision 146)
@@ -0,0 +1,410 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+// Copyright (C) 2016 ARM Ltd.
+
+/dts-v1/;
+#include "sun50i-h5.dtsi"
+#include "sun50i-h5-cpu-opp-1.4ghz.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/sun4i-a10.h>
+
+/ {
+ model = "Repka-Pi3-H5";
+ repka-freq = "1.4 GHz";
+ repka-pinout = "4";
+ compatible = "xunlong,orangepi-pc2", "allwinner,sun50i-h5";
+
+ reg_vcc3v3: vcc3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ aliases {
+ ethernet0 = &emac;
+ serial0 = &uart0;
+ serial1 = &uart1;
+ spi0 = &spi0;
+ spi1 = &spi1;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
+ ext_osc32k: ext_osc32k_clk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <32768>;
+ clock-output-names = "ext_osc32k";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ status {
+ label = "rbs:red:status";
+ gpios = <&pio 0 20 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&r_pio 0 8 GPIO_ACTIVE_LOW>;
+ post-power-on-delay-ms = <200>;
+ };
+
+};
+
+&codec {
+ allwinner,audio-routing =
+ "Line Out", "LINEOUT",
+ "MIC1", "Mic",
+ "Mic", "MBIAS";
+ status = "okay";
+};
+
+&cpu0 {
+ cpu-supply = <®_dcdc2>;
+};
+
+&cpu1 {
+ cpu-supply = <®_dcdc2>;
+};
+
+&cpu2 {
+ cpu-supply = <®_dcdc2>;
+};
+
+&cpu3 {
+ cpu-supply = <®_dcdc2>;
+};
+
+&de {
+ status = "okay";
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+&ehci2 {
+ status = "okay";
+};
+
+&ehci3 {
+ status = "okay";
+};
+
+&emac {
+ phy-handle = <&int_mii_phy>;
+ phy-mode = "mii";
+ allwinner,leds-active-low;
+ status = "okay";
+};
+
+&hdmi {
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
+&ir {
+ pinctrl-names = "default";
+ pinctrl-0 = <&r_ir_rx_pin>;
+ status = "disabled";
+};
+
+&rtc {
+ clocks = <&ext_osc32k>;
+};
+
+&mmc0 {
+ vmmc-supply = <®_vcc3v3>;
+ bus-width = <4>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+ status = "okay";
+};
+
+&mmc1 {
+ vmmc-supply = <®_vcc3v3>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ bus-width = <4>;
+ non-removable;
+ status = "okay";
+
+ brcmf: wifi@1 {
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
+ interrupt-parent = <&r_pio>;
+ interrupts = <0 7 IRQ_TYPE_LEVEL_LOW>; /* PL7 */
+ interrupt-names = "host-wake";
+ };
+
+};
+
+&mmc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_8bit_pins>;
+ vmmc-supply = <®_vcc3v3>;
+ bus-width = <8>;
+ non-removable;
+ cap-mmc-hw-reset;
+ status = "disabled";
+};
+
+&ohci0 {
+ status = "okay";
+};
+
+&ohci1 {
+ status = "okay";
+};
+
+&ohci2 {
+ status = "okay";
+};
+
+&ohci3 {
+ status = "okay";
+};
+
+&i2c1 {
+ status = "okay"; /* PA19,PA18 */
+};
+
+&i2c0 {
+ status = "okay"; /* PA11, PA12 */
+};
+
+&r_i2c {
+ status = "okay";
+
+ axp22x: pmic@34 {
+ compatible = "x-powers,axp221";
+ reg = <0x34>;
+ interrupt-parent = <&r_intc>;
+ interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+ };
+};
+
+#include "axp22x.dtsi"
+
+&ac_power_supply {
+ status = "okay";
+};
+
+®_aldo2 { /* VCC-PG 1.8 */
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-pg";
+};
+
+®_aldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-pll-avcc";
+};
+
+®_dc1sw {
+ regulator-name = "vcc-phy";
+};
+
+®_dcdc1 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-3v3";
+};
+
+®_dcdc2 {
+ regulator-always-on;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1360000>;
+ regulator-name = "vdd-cpux-a";
+};
+
+®_dcdc3 {
+ regulator-always-on;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1360000>;
+ regulator-name = "vdd-cpux-b";
+};
+
+/* DCDC3 is polyphased with DCDC2 */
+
+/*
+ * The DRAM chips used by rbs-h5 boards are DDR3 -compatibl
+ *
+ */
+®_dcdc5 {
+ regulator-always-on;
+ regulator-min-microvolt = <1500000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-name = "vcc-dram";
+};
+
+®_dldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-1";
+};
+
+®_dldo2 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-2";
+};
+
+®_dldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-3";
+};
+
+®_dldo4 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-4";
+};
+ /* VCC-wifi-IO 1.8 */
+®_eldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-wifi-io-1";
+};
+
+®_eldo2 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-wifi-io-2";
+};
+
+®_eldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-wifi-io-3";
+};
+
+
+
+®_rtc_ldo {
+ regulator-name = "vcc-rtc";
+};
+
+&spi0 {
+ pinctrl-names = "default", "default";
+ pinctrl-1 = <&spi0_cs1>;
+ cs-gpios = <0>, <&pio 0 3 0>; /* PA3 */
+
+ status = "okay";
+ spidev@0 {
+ compatible = "rohm,dh2228fv";
+ status = "okay";
+ reg = <0>;
+ spi-max-frequency = <1000000>;
+ };
+ spidev@1 {
+ compatible = "rohm,dh2228fv";
+ status = "okay";
+ reg = <1>;
+ spi-max-frequency = <1000000>;
+ };
+};
+
+&spi1 {
+ pinctrl-names = "default", "default";
+
+ status = "okay";
+ spidev@0 {
+ compatible = "rohm,dh2228fv";
+ status = "okay";
+ reg = <0>;
+ spi-max-frequency = <1000000>;
+ };
+};
+
+&pio {
+ spi0_cs1: spi0_cs1 {
+ pins = "PA3";
+ function = "gpio_out";
+ output-high;
+ };
+};
+
+
+&r_pwm {
+ status = "disabled";
+};
+
+/* to debag serial */
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pa_pins>;
+ status = "okay";
+};
+
+/* to bt-wifi module */
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
+ uart-has-rtscts;
+ status = "okay";
+
+
+
+};
+
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2_pins>, <&uart2_rts_cts_pins>;
+ status = "disabled";
+};
+
+&r_uart {
+ pinctrl-names = "default";
+ pinctrl-0 = <&r_uart_pins>;
+ status = "disabled";
+};
+
+&usb_otg {
+ dr_mode = "host";
+ status = "okay";
+};
+
+&usbphy {
+ status = "okay";
+};
+
+
Index: create-2022.10-repka-pi3-patch/u-boot-2022.10-new/arch/arm/dts/sun50i-h5-repka-pi3-alt-pwm-1.0ghz.dts
===================================================================
--- create-2022.10-repka-pi3-patch/u-boot-2022.10-new/arch/arm/dts/sun50i-h5-repka-pi3-alt-pwm-1.0ghz.dts (nonexistent)
+++ create-2022.10-repka-pi3-patch/u-boot-2022.10-new/arch/arm/dts/sun50i-h5-repka-pi3-alt-pwm-1.0ghz.dts (revision 146)
@@ -0,0 +1,410 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+// Copyright (C) 2016 ARM Ltd.
+
+/dts-v1/;
+#include "sun50i-h5.dtsi"
+#include "sun50i-h5-cpu-opp-1.0ghz.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/sun4i-a10.h>
+
+/ {
+ model = "Repka-Pi3-H5";
+ repka-freq = "1.0 GHz";
+ repka-pinout = "5";
+ compatible = "xunlong,orangepi-pc2", "allwinner,sun50i-h5";
+
+ reg_vcc3v3: vcc3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ aliases {
+ ethernet0 = &emac;
+ serial0 = &uart0;
+ serial1 = &uart1;
+ spi0 = &spi0;
+ spi1 = &spi1;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
+ ext_osc32k: ext_osc32k_clk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <32768>;
+ clock-output-names = "ext_osc32k";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ status {
+ label = "rbs:red:status";
+ gpios = <&pio 0 20 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&r_pio 0 8 GPIO_ACTIVE_LOW>;
+ post-power-on-delay-ms = <200>;
+ };
+
+};
+
+&codec {
+ allwinner,audio-routing =
+ "Line Out", "LINEOUT",
+ "MIC1", "Mic",
+ "Mic", "MBIAS";
+ status = "okay";
+};
+
+&cpu0 {
+ cpu-supply = <®_dcdc2>;
+};
+
+&cpu1 {
+ cpu-supply = <®_dcdc2>;
+};
+
+&cpu2 {
+ cpu-supply = <®_dcdc2>;
+};
+
+&cpu3 {
+ cpu-supply = <®_dcdc2>;
+};
+
+&de {
+ status = "okay";
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+&ehci2 {
+ status = "okay";
+};
+
+&ehci3 {
+ status = "okay";
+};
+
+&emac {
+ phy-handle = <&int_mii_phy>;
+ phy-mode = "mii";
+ allwinner,leds-active-low;
+ status = "okay";
+};
+
+&hdmi {
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
+&ir {
+ pinctrl-names = "default";
+ pinctrl-0 = <&r_ir_rx_pin>;
+ status = "disabled";
+};
+
+&rtc {
+ clocks = <&ext_osc32k>;
+};
+
+&mmc0 {
+ vmmc-supply = <®_vcc3v3>;
+ bus-width = <4>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+ status = "okay";
+};
+
+&mmc1 {
+ vmmc-supply = <®_vcc3v3>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ bus-width = <4>;
+ non-removable;
+ status = "okay";
+
+ brcmf: wifi@1 {
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
+ interrupt-parent = <&r_pio>;
+ interrupts = <0 7 IRQ_TYPE_LEVEL_LOW>; /* PL7 */
+ interrupt-names = "host-wake";
+ };
+
+};
+
+&mmc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_8bit_pins>;
+ vmmc-supply = <®_vcc3v3>;
+ bus-width = <8>;
+ non-removable;
+ cap-mmc-hw-reset;
+ status = "disabled";
+};
+
+&ohci0 {
+ status = "okay";
+};
+
+&ohci1 {
+ status = "okay";
+};
+
+&ohci2 {
+ status = "okay";
+};
+
+&ohci3 {
+ status = "okay";
+};
+
+&i2c1 {
+ status = "disabled"; /* PA19,PA18 */
+};
+
+&i2c0 {
+ status = "okay"; /* PA11, PA12 */
+};
+
+&r_i2c {
+ status = "okay";
+
+ axp22x: pmic@34 {
+ compatible = "x-powers,axp221";
+ reg = <0x34>;
+ interrupt-parent = <&r_intc>;
+ interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+ };
+};
+
+#include "axp22x.dtsi"
+
+&ac_power_supply {
+ status = "okay";
+};
+
+®_aldo2 { /* VCC-PG 1.8 */
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-pg";
+};
+
+®_aldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-pll-avcc";
+};
+
+®_dc1sw {
+ regulator-name = "vcc-phy";
+};
+
+®_dcdc1 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-3v3";
+};
+
+®_dcdc2 {
+ regulator-always-on;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1360000>;
+ regulator-name = "vdd-cpux-a";
+};
+
+®_dcdc3 {
+ regulator-always-on;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1360000>;
+ regulator-name = "vdd-cpux-b";
+};
+
+/* DCDC3 is polyphased with DCDC2 */
+
+/*
+ * The DRAM chips used by rbs-h5 boards are DDR3 -compatibl
+ *
+ */
+®_dcdc5 {
+ regulator-always-on;
+ regulator-min-microvolt = <1500000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-name = "vcc-dram";
+};
+
+®_dldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-1";
+};
+
+®_dldo2 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-2";
+};
+
+®_dldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-3";
+};
+
+®_dldo4 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-4";
+};
+ /* VCC-wifi-IO 1.8 */
+®_eldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-wifi-io-1";
+};
+
+®_eldo2 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-wifi-io-2";
+};
+
+®_eldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-wifi-io-3";
+};
+
+
+
+®_rtc_ldo {
+ regulator-name = "vcc-rtc";
+};
+
+&spi0 {
+ pinctrl-names = "default", "default";
+ pinctrl-1 = <&spi0_cs1>;
+ cs-gpios = <0>, <&pio 0 3 0>; /* PA3 */
+
+ status = "okay";
+ spidev@0 {
+ compatible = "rohm,dh2228fv";
+ status = "okay";
+ reg = <0>;
+ spi-max-frequency = <1000000>;
+ };
+ spidev@1 {
+ compatible = "rohm,dh2228fv";
+ status = "okay";
+ reg = <1>;
+ spi-max-frequency = <1000000>;
+ };
+};
+
+&spi1 {
+ pinctrl-names = "default", "default";
+
+ status = "okay";
+ spidev@0 {
+ compatible = "rohm,dh2228fv";
+ status = "okay";
+ reg = <0>;
+ spi-max-frequency = <1000000>;
+ };
+};
+
+&pio {
+ spi0_cs1: spi0_cs1 {
+ pins = "PA3";
+ function = "gpio_out";
+ output-high;
+ };
+};
+
+
+&r_pwm {
+ status = "okay";
+};
+
+/* to debag serial */
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pa_pins>;
+ status = "okay";
+};
+
+/* to bt-wifi module */
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
+ uart-has-rtscts;
+ status = "okay";
+
+
+
+};
+
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2_pins>, <&uart2_rts_cts_pins>;
+ status = "disabled";
+};
+
+&r_uart {
+ pinctrl-names = "default";
+ pinctrl-0 = <&r_uart_pins>;
+ status = "disabled";
+};
+
+&usb_otg {
+ dr_mode = "host";
+ status = "okay";
+};
+
+&usbphy {
+ status = "okay";
+};
+
+
Index: create-2022.10-repka-pi3-patch/u-boot-2022.10-new/arch/arm/dts/sun50i-h5-repka-pi3-alt-pwm-1.2ghz.dts
===================================================================
--- create-2022.10-repka-pi3-patch/u-boot-2022.10-new/arch/arm/dts/sun50i-h5-repka-pi3-alt-pwm-1.2ghz.dts (nonexistent)
+++ create-2022.10-repka-pi3-patch/u-boot-2022.10-new/arch/arm/dts/sun50i-h5-repka-pi3-alt-pwm-1.2ghz.dts (revision 146)
@@ -0,0 +1,410 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+// Copyright (C) 2016 ARM Ltd.
+
+/dts-v1/;
+#include "sun50i-h5.dtsi"
+#include "sun50i-h5-cpu-opp-1.2ghz.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/sun4i-a10.h>
+
+/ {
+ model = "Repka-Pi3-H5";
+ repka-freq = "1.2 GHz";
+ repka-pinout = "5";
+ compatible = "xunlong,orangepi-pc2", "allwinner,sun50i-h5";
+
+ reg_vcc3v3: vcc3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ aliases {
+ ethernet0 = &emac;
+ serial0 = &uart0;
+ serial1 = &uart1;
+ spi0 = &spi0;
+ spi1 = &spi1;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
+ ext_osc32k: ext_osc32k_clk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <32768>;
+ clock-output-names = "ext_osc32k";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ status {
+ label = "rbs:red:status";
+ gpios = <&pio 0 20 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&r_pio 0 8 GPIO_ACTIVE_LOW>;
+ post-power-on-delay-ms = <200>;
+ };
+
+};
+
+&codec {
+ allwinner,audio-routing =
+ "Line Out", "LINEOUT",
+ "MIC1", "Mic",
+ "Mic", "MBIAS";
+ status = "okay";
+};
+
+&cpu0 {
+ cpu-supply = <®_dcdc2>;
+};
+
+&cpu1 {
+ cpu-supply = <®_dcdc2>;
+};
+
+&cpu2 {
+ cpu-supply = <®_dcdc2>;
+};
+
+&cpu3 {
+ cpu-supply = <®_dcdc2>;
+};
+
+&de {
+ status = "okay";
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+&ehci2 {
+ status = "okay";
+};
+
+&ehci3 {
+ status = "okay";
+};
+
+&emac {
+ phy-handle = <&int_mii_phy>;
+ phy-mode = "mii";
+ allwinner,leds-active-low;
+ status = "okay";
+};
+
+&hdmi {
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
+&ir {
+ pinctrl-names = "default";
+ pinctrl-0 = <&r_ir_rx_pin>;
+ status = "disabled";
+};
+
+&rtc {
+ clocks = <&ext_osc32k>;
+};
+
+&mmc0 {
+ vmmc-supply = <®_vcc3v3>;
+ bus-width = <4>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+ status = "okay";
+};
+
+&mmc1 {
+ vmmc-supply = <®_vcc3v3>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ bus-width = <4>;
+ non-removable;
+ status = "okay";
+
+ brcmf: wifi@1 {
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
+ interrupt-parent = <&r_pio>;
+ interrupts = <0 7 IRQ_TYPE_LEVEL_LOW>; /* PL7 */
+ interrupt-names = "host-wake";
+ };
+
+};
+
+&mmc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_8bit_pins>;
+ vmmc-supply = <®_vcc3v3>;
+ bus-width = <8>;
+ non-removable;
+ cap-mmc-hw-reset;
+ status = "disabled";
+};
+
+&ohci0 {
+ status = "okay";
+};
+
+&ohci1 {
+ status = "okay";
+};
+
+&ohci2 {
+ status = "okay";
+};
+
+&ohci3 {
+ status = "okay";
+};
+
+&i2c1 {
+ status = "disabled"; /* PA19,PA18 */
+};
+
+&i2c0 {
+ status = "okay"; /* PA11, PA12 */
+};
+
+&r_i2c {
+ status = "okay";
+
+ axp22x: pmic@34 {
+ compatible = "x-powers,axp221";
+ reg = <0x34>;
+ interrupt-parent = <&r_intc>;
+ interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+ };
+};
+
+#include "axp22x.dtsi"
+
+&ac_power_supply {
+ status = "okay";
+};
+
+®_aldo2 { /* VCC-PG 1.8 */
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-pg";
+};
+
+®_aldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-pll-avcc";
+};
+
+®_dc1sw {
+ regulator-name = "vcc-phy";
+};
+
+®_dcdc1 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-3v3";
+};
+
+®_dcdc2 {
+ regulator-always-on;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1360000>;
+ regulator-name = "vdd-cpux-a";
+};
+
+®_dcdc3 {
+ regulator-always-on;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1360000>;
+ regulator-name = "vdd-cpux-b";
+};
+
+/* DCDC3 is polyphased with DCDC2 */
+
+/*
+ * The DRAM chips used by rbs-h5 boards are DDR3 -compatibl
+ *
+ */
+®_dcdc5 {
+ regulator-always-on;
+ regulator-min-microvolt = <1500000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-name = "vcc-dram";
+};
+
+®_dldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-1";
+};
+
+®_dldo2 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-2";
+};
+
+®_dldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-3";
+};
+
+®_dldo4 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-4";
+};
+ /* VCC-wifi-IO 1.8 */
+®_eldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-wifi-io-1";
+};
+
+®_eldo2 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-wifi-io-2";
+};
+
+®_eldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-wifi-io-3";
+};
+
+
+
+®_rtc_ldo {
+ regulator-name = "vcc-rtc";
+};
+
+&spi0 {
+ pinctrl-names = "default", "default";
+ pinctrl-1 = <&spi0_cs1>;
+ cs-gpios = <0>, <&pio 0 3 0>; /* PA3 */
+
+ status = "okay";
+ spidev@0 {
+ compatible = "rohm,dh2228fv";
+ status = "okay";
+ reg = <0>;
+ spi-max-frequency = <1000000>;
+ };
+ spidev@1 {
+ compatible = "rohm,dh2228fv";
+ status = "okay";
+ reg = <1>;
+ spi-max-frequency = <1000000>;
+ };
+};
+
+&spi1 {
+ pinctrl-names = "default", "default";
+
+ status = "okay";
+ spidev@0 {
+ compatible = "rohm,dh2228fv";
+ status = "okay";
+ reg = <0>;
+ spi-max-frequency = <1000000>;
+ };
+};
+
+&pio {
+ spi0_cs1: spi0_cs1 {
+ pins = "PA3";
+ function = "gpio_out";
+ output-high;
+ };
+};
+
+
+&r_pwm {
+ status = "okay";
+};
+
+/* to debag serial */
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pa_pins>;
+ status = "okay";
+};
+
+/* to bt-wifi module */
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
+ uart-has-rtscts;
+ status = "okay";
+
+
+
+};
+
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2_pins>, <&uart2_rts_cts_pins>;
+ status = "disabled";
+};
+
+&r_uart {
+ pinctrl-names = "default";
+ pinctrl-0 = <&r_uart_pins>;
+ status = "disabled";
+};
+
+&usb_otg {
+ dr_mode = "host";
+ status = "okay";
+};
+
+&usbphy {
+ status = "okay";
+};
+
+
Index: create-2022.10-repka-pi3-patch/u-boot-2022.10-new/arch/arm/dts/sun50i-h5-repka-pi3-alt-pwm-1.4ghz.dts
===================================================================
--- create-2022.10-repka-pi3-patch/u-boot-2022.10-new/arch/arm/dts/sun50i-h5-repka-pi3-alt-pwm-1.4ghz.dts (nonexistent)
+++ create-2022.10-repka-pi3-patch/u-boot-2022.10-new/arch/arm/dts/sun50i-h5-repka-pi3-alt-pwm-1.4ghz.dts (revision 146)
@@ -0,0 +1,410 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+// Copyright (C) 2016 ARM Ltd.
+
+/dts-v1/;
+#include "sun50i-h5.dtsi"
+#include "sun50i-h5-cpu-opp-1.4ghz.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/sun4i-a10.h>
+
+/ {
+ model = "Repka-Pi3-H5";
+ repka-freq = "1.4 GHz";
+ repka-pinout = "5";
+ compatible = "xunlong,orangepi-pc2", "allwinner,sun50i-h5";
+
+ reg_vcc3v3: vcc3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ aliases {
+ ethernet0 = &emac;
+ serial0 = &uart0;
+ serial1 = &uart1;
+ spi0 = &spi0;
+ spi1 = &spi1;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
+ ext_osc32k: ext_osc32k_clk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <32768>;
+ clock-output-names = "ext_osc32k";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ status {
+ label = "rbs:red:status";
+ gpios = <&pio 0 20 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&r_pio 0 8 GPIO_ACTIVE_LOW>;
+ post-power-on-delay-ms = <200>;
+ };
+
+};
+
+&codec {
+ allwinner,audio-routing =
+ "Line Out", "LINEOUT",
+ "MIC1", "Mic",
+ "Mic", "MBIAS";
+ status = "okay";
+};
+
+&cpu0 {
+ cpu-supply = <®_dcdc2>;
+};
+
+&cpu1 {
+ cpu-supply = <®_dcdc2>;
+};
+
+&cpu2 {
+ cpu-supply = <®_dcdc2>;
+};
+
+&cpu3 {
+ cpu-supply = <®_dcdc2>;
+};
+
+&de {
+ status = "okay";
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+&ehci2 {
+ status = "okay";
+};
+
+&ehci3 {
+ status = "okay";
+};
+
+&emac {
+ phy-handle = <&int_mii_phy>;
+ phy-mode = "mii";
+ allwinner,leds-active-low;
+ status = "okay";
+};
+
+&hdmi {
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
+&ir {
+ pinctrl-names = "default";
+ pinctrl-0 = <&r_ir_rx_pin>;
+ status = "disabled";
+};
+
+&rtc {
+ clocks = <&ext_osc32k>;
+};
+
+&mmc0 {
+ vmmc-supply = <®_vcc3v3>;
+ bus-width = <4>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+ status = "okay";
+};
+
+&mmc1 {
+ vmmc-supply = <®_vcc3v3>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ bus-width = <4>;
+ non-removable;
+ status = "okay";
+
+ brcmf: wifi@1 {
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
+ interrupt-parent = <&r_pio>;
+ interrupts = <0 7 IRQ_TYPE_LEVEL_LOW>; /* PL7 */
+ interrupt-names = "host-wake";
+ };
+
+};
+
+&mmc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_8bit_pins>;
+ vmmc-supply = <®_vcc3v3>;
+ bus-width = <8>;
+ non-removable;
+ cap-mmc-hw-reset;
+ status = "disabled";
+};
+
+&ohci0 {
+ status = "okay";
+};
+
+&ohci1 {
+ status = "okay";
+};
+
+&ohci2 {
+ status = "okay";
+};
+
+&ohci3 {
+ status = "okay";
+};
+
+&i2c1 {
+ status = "disabled"; /* PA19,PA18 */
+};
+
+&i2c0 {
+ status = "okay"; /* PA11, PA12 */
+};
+
+&r_i2c {
+ status = "okay";
+
+ axp22x: pmic@34 {
+ compatible = "x-powers,axp221";
+ reg = <0x34>;
+ interrupt-parent = <&r_intc>;
+ interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+ };
+};
+
+#include "axp22x.dtsi"
+
+&ac_power_supply {
+ status = "okay";
+};
+
+®_aldo2 { /* VCC-PG 1.8 */
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-pg";
+};
+
+®_aldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-pll-avcc";
+};
+
+®_dc1sw {
+ regulator-name = "vcc-phy";
+};
+
+®_dcdc1 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-3v3";
+};
+
+®_dcdc2 {
+ regulator-always-on;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1360000>;
+ regulator-name = "vdd-cpux-a";
+};
+
+®_dcdc3 {
+ regulator-always-on;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1360000>;
+ regulator-name = "vdd-cpux-b";
+};
+
+/* DCDC3 is polyphased with DCDC2 */
+
+/*
+ * The DRAM chips used by rbs-h5 boards are DDR3 -compatibl
+ *
+ */
+®_dcdc5 {
+ regulator-always-on;
+ regulator-min-microvolt = <1500000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-name = "vcc-dram";
+};
+
+®_dldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-1";
+};
+
+®_dldo2 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-2";
+};
+
+®_dldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-3";
+};
+
+®_dldo4 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-4";
+};
+ /* VCC-wifi-IO 1.8 */
+®_eldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-wifi-io-1";
+};
+
+®_eldo2 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-wifi-io-2";
+};
+
+®_eldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-wifi-io-3";
+};
+
+
+
+®_rtc_ldo {
+ regulator-name = "vcc-rtc";
+};
+
+&spi0 {
+ pinctrl-names = "default", "default";
+ pinctrl-1 = <&spi0_cs1>;
+ cs-gpios = <0>, <&pio 0 3 0>; /* PA3 */
+
+ status = "okay";
+ spidev@0 {
+ compatible = "rohm,dh2228fv";
+ status = "okay";
+ reg = <0>;
+ spi-max-frequency = <1000000>;
+ };
+ spidev@1 {
+ compatible = "rohm,dh2228fv";
+ status = "okay";
+ reg = <1>;
+ spi-max-frequency = <1000000>;
+ };
+};
+
+&spi1 {
+ pinctrl-names = "default", "default";
+
+ status = "okay";
+ spidev@0 {
+ compatible = "rohm,dh2228fv";
+ status = "okay";
+ reg = <0>;
+ spi-max-frequency = <1000000>;
+ };
+};
+
+&pio {
+ spi0_cs1: spi0_cs1 {
+ pins = "PA3";
+ function = "gpio_out";
+ output-high;
+ };
+};
+
+
+&r_pwm {
+ status = "okay";
+};
+
+/* to debag serial */
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pa_pins>;
+ status = "okay";
+};
+
+/* to bt-wifi module */
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
+ uart-has-rtscts;
+ status = "okay";
+
+
+
+};
+
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2_pins>, <&uart2_rts_cts_pins>;
+ status = "disabled";
+};
+
+&r_uart {
+ pinctrl-names = "default";
+ pinctrl-0 = <&r_uart_pins>;
+ status = "disabled";
+};
+
+&usb_otg {
+ dr_mode = "host";
+ status = "okay";
+};
+
+&usbphy {
+ status = "okay";
+};
+
+
Index: create-2022.10-repka-pi3-patch/u-boot-2022.10-new/arch/arm/dts/sun50i-h5-repka-pi3-alt-uart-1.0ghz.dts
===================================================================
--- create-2022.10-repka-pi3-patch/u-boot-2022.10-new/arch/arm/dts/sun50i-h5-repka-pi3-alt-uart-1.0ghz.dts (nonexistent)
+++ create-2022.10-repka-pi3-patch/u-boot-2022.10-new/arch/arm/dts/sun50i-h5-repka-pi3-alt-uart-1.0ghz.dts (revision 146)
@@ -0,0 +1,410 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+// Copyright (C) 2016 ARM Ltd.
+
+/dts-v1/;
+#include "sun50i-h5.dtsi"
+#include "sun50i-h5-cpu-opp-1.0ghz.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/sun4i-a10.h>
+
+/ {
+ model = "Repka-Pi3-H5";
+ repka-freq = "1.0 GHz";
+ repka-pinout = "3";
+ compatible = "xunlong,orangepi-pc2", "allwinner,sun50i-h5";
+
+ reg_vcc3v3: vcc3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ aliases {
+ ethernet0 = &emac;
+ serial0 = &uart0;
+ serial1 = &uart1;
+ spi0 = &spi0;
+ spi1 = &spi1;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
+ ext_osc32k: ext_osc32k_clk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <32768>;
+ clock-output-names = "ext_osc32k";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ status {
+ label = "rbs:red:status";
+ gpios = <&pio 0 20 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&r_pio 0 8 GPIO_ACTIVE_LOW>;
+ post-power-on-delay-ms = <200>;
+ };
+
+};
+
+&codec {
+ allwinner,audio-routing =
+ "Line Out", "LINEOUT",
+ "MIC1", "Mic",
+ "Mic", "MBIAS";
+ status = "okay";
+};
+
+&cpu0 {
+ cpu-supply = <®_dcdc2>;
+};
+
+&cpu1 {
+ cpu-supply = <®_dcdc2>;
+};
+
+&cpu2 {
+ cpu-supply = <®_dcdc2>;
+};
+
+&cpu3 {
+ cpu-supply = <®_dcdc2>;
+};
+
+&de {
+ status = "okay";
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+&ehci2 {
+ status = "okay";
+};
+
+&ehci3 {
+ status = "okay";
+};
+
+&emac {
+ phy-handle = <&int_mii_phy>;
+ phy-mode = "mii";
+ allwinner,leds-active-low;
+ status = "okay";
+};
+
+&hdmi {
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
+&ir {
+ pinctrl-names = "default";
+ pinctrl-0 = <&r_ir_rx_pin>;
+ status = "disabled";
+};
+
+&rtc {
+ clocks = <&ext_osc32k>;
+};
+
+&mmc0 {
+ vmmc-supply = <®_vcc3v3>;
+ bus-width = <4>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+ status = "okay";
+};
+
+&mmc1 {
+ vmmc-supply = <®_vcc3v3>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ bus-width = <4>;
+ non-removable;
+ status = "okay";
+
+ brcmf: wifi@1 {
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
+ interrupt-parent = <&r_pio>;
+ interrupts = <0 7 IRQ_TYPE_LEVEL_LOW>; /* PL7 */
+ interrupt-names = "host-wake";
+ };
+
+};
+
+&mmc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_8bit_pins>;
+ vmmc-supply = <®_vcc3v3>;
+ bus-width = <8>;
+ non-removable;
+ cap-mmc-hw-reset;
+ status = "disabled";
+};
+
+&ohci0 {
+ status = "okay";
+};
+
+&ohci1 {
+ status = "okay";
+};
+
+&ohci2 {
+ status = "okay";
+};
+
+&ohci3 {
+ status = "okay";
+};
+
+&i2c1 {
+ status = "disabled"; /* PA19,PA18 */
+};
+
+&i2c0 {
+ status = "okay"; /* PA11, PA12 */
+};
+
+&r_i2c {
+ status = "okay";
+
+ axp22x: pmic@34 {
+ compatible = "x-powers,axp221";
+ reg = <0x34>;
+ interrupt-parent = <&r_intc>;
+ interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+ };
+};
+
+#include "axp22x.dtsi"
+
+&ac_power_supply {
+ status = "okay";
+};
+
+®_aldo2 { /* VCC-PG 1.8 */
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-pg";
+};
+
+®_aldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-pll-avcc";
+};
+
+®_dc1sw {
+ regulator-name = "vcc-phy";
+};
+
+®_dcdc1 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-3v3";
+};
+
+®_dcdc2 {
+ regulator-always-on;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1360000>;
+ regulator-name = "vdd-cpux-a";
+};
+
+®_dcdc3 {
+ regulator-always-on;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1360000>;
+ regulator-name = "vdd-cpux-b";
+};
+
+/* DCDC3 is polyphased with DCDC2 */
+
+/*
+ * The DRAM chips used by rbs-h5 boards are DDR3 -compatibl
+ *
+ */
+®_dcdc5 {
+ regulator-always-on;
+ regulator-min-microvolt = <1500000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-name = "vcc-dram";
+};
+
+®_dldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-1";
+};
+
+®_dldo2 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-2";
+};
+
+®_dldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-3";
+};
+
+®_dldo4 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-4";
+};
+ /* VCC-wifi-IO 1.8 */
+®_eldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-wifi-io-1";
+};
+
+®_eldo2 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-wifi-io-2";
+};
+
+®_eldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-wifi-io-3";
+};
+
+
+
+®_rtc_ldo {
+ regulator-name = "vcc-rtc";
+};
+
+&spi0 {
+ pinctrl-names = "default", "default";
+ pinctrl-1 = <&spi0_cs1>;
+ cs-gpios = <0>, <&pio 0 3 0>; /* PA3 */
+
+ status = "okay";
+ spidev@0 {
+ compatible = "rohm,dh2228fv";
+ status = "okay";
+ reg = <0>;
+ spi-max-frequency = <1000000>;
+ };
+ spidev@1 {
+ compatible = "rohm,dh2228fv";
+ status = "okay";
+ reg = <1>;
+ spi-max-frequency = <1000000>;
+ };
+};
+
+&spi1 {
+ pinctrl-names = "default", "default";
+
+ status = "okay";
+ spidev@0 {
+ compatible = "rohm,dh2228fv";
+ status = "okay";
+ reg = <0>;
+ spi-max-frequency = <1000000>;
+ };
+};
+
+&pio {
+ spi0_cs1: spi0_cs1 {
+ pins = "PA3";
+ function = "gpio_out";
+ output-high;
+ };
+};
+
+
+&r_pwm {
+ status = "disabled";
+};
+
+/* to debag serial */
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pa_pins>;
+ status = "okay";
+};
+
+/* to bt-wifi module */
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
+ uart-has-rtscts;
+ status = "okay";
+
+
+
+};
+
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2_pins>;
+ status = "okay";
+};
+
+&r_uart {
+ pinctrl-names = "default";
+ pinctrl-0 = <&r_uart_pins>;
+ status = "okay";
+};
+
+&usb_otg {
+ dr_mode = "host";
+ status = "okay";
+};
+
+&usbphy {
+ status = "okay";
+};
+
+
Index: create-2022.10-repka-pi3-patch/u-boot-2022.10-new/arch/arm/dts/sun50i-h5-repka-pi3-alt-uart-1.2ghz.dts
===================================================================
--- create-2022.10-repka-pi3-patch/u-boot-2022.10-new/arch/arm/dts/sun50i-h5-repka-pi3-alt-uart-1.2ghz.dts (nonexistent)
+++ create-2022.10-repka-pi3-patch/u-boot-2022.10-new/arch/arm/dts/sun50i-h5-repka-pi3-alt-uart-1.2ghz.dts (revision 146)
@@ -0,0 +1,410 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+// Copyright (C) 2016 ARM Ltd.
+
+/dts-v1/;
+#include "sun50i-h5.dtsi"
+#include "sun50i-h5-cpu-opp-1.2ghz.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/sun4i-a10.h>
+
+/ {
+ model = "Repka-Pi3-H5";
+ repka-freq = "1.2 GHz";
+ repka-pinout = "3";
+ compatible = "xunlong,orangepi-pc2", "allwinner,sun50i-h5";
+
+ reg_vcc3v3: vcc3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ aliases {
+ ethernet0 = &emac;
+ serial0 = &uart0;
+ serial1 = &uart1;
+ spi0 = &spi0;
+ spi1 = &spi1;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
+ ext_osc32k: ext_osc32k_clk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <32768>;
+ clock-output-names = "ext_osc32k";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ status {
+ label = "rbs:red:status";
+ gpios = <&pio 0 20 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&r_pio 0 8 GPIO_ACTIVE_LOW>;
+ post-power-on-delay-ms = <200>;
+ };
+
+};
+
+&codec {
+ allwinner,audio-routing =
+ "Line Out", "LINEOUT",
+ "MIC1", "Mic",
+ "Mic", "MBIAS";
+ status = "okay";
+};
+
+&cpu0 {
+ cpu-supply = <®_dcdc2>;
+};
+
+&cpu1 {
+ cpu-supply = <®_dcdc2>;
+};
+
+&cpu2 {
+ cpu-supply = <®_dcdc2>;
+};
+
+&cpu3 {
+ cpu-supply = <®_dcdc2>;
+};
+
+&de {
+ status = "okay";
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+&ehci2 {
+ status = "okay";
+};
+
+&ehci3 {
+ status = "okay";
+};
+
+&emac {
+ phy-handle = <&int_mii_phy>;
+ phy-mode = "mii";
+ allwinner,leds-active-low;
+ status = "okay";
+};
+
+&hdmi {
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
+&ir {
+ pinctrl-names = "default";
+ pinctrl-0 = <&r_ir_rx_pin>;
+ status = "disabled";
+};
+
+&rtc {
+ clocks = <&ext_osc32k>;
+};
+
+&mmc0 {
+ vmmc-supply = <®_vcc3v3>;
+ bus-width = <4>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+ status = "okay";
+};
+
+&mmc1 {
+ vmmc-supply = <®_vcc3v3>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ bus-width = <4>;
+ non-removable;
+ status = "okay";
+
+ brcmf: wifi@1 {
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
+ interrupt-parent = <&r_pio>;
+ interrupts = <0 7 IRQ_TYPE_LEVEL_LOW>; /* PL7 */
+ interrupt-names = "host-wake";
+ };
+
+};
+
+&mmc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_8bit_pins>;
+ vmmc-supply = <®_vcc3v3>;
+ bus-width = <8>;
+ non-removable;
+ cap-mmc-hw-reset;
+ status = "disabled";
+};
+
+&ohci0 {
+ status = "okay";
+};
+
+&ohci1 {
+ status = "okay";
+};
+
+&ohci2 {
+ status = "okay";
+};
+
+&ohci3 {
+ status = "okay";
+};
+
+&i2c1 {
+ status = "disabled"; /* PA19,PA18 */
+};
+
+&i2c0 {
+ status = "okay"; /* PA11, PA12 */
+};
+
+&r_i2c {
+ status = "okay";
+
+ axp22x: pmic@34 {
+ compatible = "x-powers,axp221";
+ reg = <0x34>;
+ interrupt-parent = <&r_intc>;
+ interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+ };
+};
+
+#include "axp22x.dtsi"
+
+&ac_power_supply {
+ status = "okay";
+};
+
+®_aldo2 { /* VCC-PG 1.8 */
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-pg";
+};
+
+®_aldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-pll-avcc";
+};
+
+®_dc1sw {
+ regulator-name = "vcc-phy";
+};
+
+®_dcdc1 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-3v3";
+};
+
+®_dcdc2 {
+ regulator-always-on;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1360000>;
+ regulator-name = "vdd-cpux-a";
+};
+
+®_dcdc3 {
+ regulator-always-on;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1360000>;
+ regulator-name = "vdd-cpux-b";
+};
+
+/* DCDC3 is polyphased with DCDC2 */
+
+/*
+ * The DRAM chips used by rbs-h5 boards are DDR3 -compatibl
+ *
+ */
+®_dcdc5 {
+ regulator-always-on;
+ regulator-min-microvolt = <1500000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-name = "vcc-dram";
+};
+
+®_dldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-1";
+};
+
+®_dldo2 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-2";
+};
+
+®_dldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-3";
+};
+
+®_dldo4 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-4";
+};
+ /* VCC-wifi-IO 1.8 */
+®_eldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-wifi-io-1";
+};
+
+®_eldo2 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-wifi-io-2";
+};
+
+®_eldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-wifi-io-3";
+};
+
+
+
+®_rtc_ldo {
+ regulator-name = "vcc-rtc";
+};
+
+&spi0 {
+ pinctrl-names = "default", "default";
+ pinctrl-1 = <&spi0_cs1>;
+ cs-gpios = <0>, <&pio 0 3 0>; /* PA3 */
+
+ status = "okay";
+ spidev@0 {
+ compatible = "rohm,dh2228fv";
+ status = "okay";
+ reg = <0>;
+ spi-max-frequency = <1000000>;
+ };
+ spidev@1 {
+ compatible = "rohm,dh2228fv";
+ status = "okay";
+ reg = <1>;
+ spi-max-frequency = <1000000>;
+ };
+};
+
+&spi1 {
+ pinctrl-names = "default", "default";
+
+ status = "okay";
+ spidev@0 {
+ compatible = "rohm,dh2228fv";
+ status = "okay";
+ reg = <0>;
+ spi-max-frequency = <1000000>;
+ };
+};
+
+&pio {
+ spi0_cs1: spi0_cs1 {
+ pins = "PA3";
+ function = "gpio_out";
+ output-high;
+ };
+};
+
+
+&r_pwm {
+ status = "disabled";
+};
+
+/* to debag serial */
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pa_pins>;
+ status = "okay";
+};
+
+/* to bt-wifi module */
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
+ uart-has-rtscts;
+ status = "okay";
+
+
+
+};
+
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2_pins>;
+ status = "okay";
+};
+
+&r_uart {
+ pinctrl-names = "default";
+ pinctrl-0 = <&r_uart_pins>;
+ status = "okay";
+};
+
+&usb_otg {
+ dr_mode = "host";
+ status = "okay";
+};
+
+&usbphy {
+ status = "okay";
+};
+
+
Index: create-2022.10-repka-pi3-patch/u-boot-2022.10-new/arch/arm/dts/sun50i-h5-repka-pi3-alt-uart-1.4ghz.dts
===================================================================
--- create-2022.10-repka-pi3-patch/u-boot-2022.10-new/arch/arm/dts/sun50i-h5-repka-pi3-alt-uart-1.4ghz.dts (nonexistent)
+++ create-2022.10-repka-pi3-patch/u-boot-2022.10-new/arch/arm/dts/sun50i-h5-repka-pi3-alt-uart-1.4ghz.dts (revision 146)
@@ -0,0 +1,410 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+// Copyright (C) 2016 ARM Ltd.
+
+/dts-v1/;
+#include "sun50i-h5.dtsi"
+#include "sun50i-h5-cpu-opp-1.4ghz.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/sun4i-a10.h>
+
+/ {
+ model = "Repka-Pi3-H5";
+ repka-freq = "1.4 GHz";
+ repka-pinout = "3";
+ compatible = "xunlong,orangepi-pc2", "allwinner,sun50i-h5";
+
+ reg_vcc3v3: vcc3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ aliases {
+ ethernet0 = &emac;
+ serial0 = &uart0;
+ serial1 = &uart1;
+ spi0 = &spi0;
+ spi1 = &spi1;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
+ ext_osc32k: ext_osc32k_clk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <32768>;
+ clock-output-names = "ext_osc32k";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ status {
+ label = "rbs:red:status";
+ gpios = <&pio 0 20 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&r_pio 0 8 GPIO_ACTIVE_LOW>;
+ post-power-on-delay-ms = <200>;
+ };
+
+};
+
+&codec {
+ allwinner,audio-routing =
+ "Line Out", "LINEOUT",
+ "MIC1", "Mic",
+ "Mic", "MBIAS";
+ status = "okay";
+};
+
+&cpu0 {
+ cpu-supply = <®_dcdc2>;
+};
+
+&cpu1 {
+ cpu-supply = <®_dcdc2>;
+};
+
+&cpu2 {
+ cpu-supply = <®_dcdc2>;
+};
+
+&cpu3 {
+ cpu-supply = <®_dcdc2>;
+};
+
+&de {
+ status = "okay";
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+&ehci2 {
+ status = "okay";
+};
+
+&ehci3 {
+ status = "okay";
+};
+
+&emac {
+ phy-handle = <&int_mii_phy>;
+ phy-mode = "mii";
+ allwinner,leds-active-low;
+ status = "okay";
+};
+
+&hdmi {
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
+&ir {
+ pinctrl-names = "default";
+ pinctrl-0 = <&r_ir_rx_pin>;
+ status = "disabled";
+};
+
+&rtc {
+ clocks = <&ext_osc32k>;
+};
+
+&mmc0 {
+ vmmc-supply = <®_vcc3v3>;
+ bus-width = <4>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+ status = "okay";
+};
+
+&mmc1 {
+ vmmc-supply = <®_vcc3v3>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ bus-width = <4>;
+ non-removable;
+ status = "okay";
+
+ brcmf: wifi@1 {
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
+ interrupt-parent = <&r_pio>;
+ interrupts = <0 7 IRQ_TYPE_LEVEL_LOW>; /* PL7 */
+ interrupt-names = "host-wake";
+ };
+
+};
+
+&mmc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_8bit_pins>;
+ vmmc-supply = <®_vcc3v3>;
+ bus-width = <8>;
+ non-removable;
+ cap-mmc-hw-reset;
+ status = "disabled";
+};
+
+&ohci0 {
+ status = "okay";
+};
+
+&ohci1 {
+ status = "okay";
+};
+
+&ohci2 {
+ status = "okay";
+};
+
+&ohci3 {
+ status = "okay";
+};
+
+&i2c1 {
+ status = "disabled"; /* PA19,PA18 */
+};
+
+&i2c0 {
+ status = "okay"; /* PA11, PA12 */
+};
+
+&r_i2c {
+ status = "okay";
+
+ axp22x: pmic@34 {
+ compatible = "x-powers,axp221";
+ reg = <0x34>;
+ interrupt-parent = <&r_intc>;
+ interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+ };
+};
+
+#include "axp22x.dtsi"
+
+&ac_power_supply {
+ status = "okay";
+};
+
+®_aldo2 { /* VCC-PG 1.8 */
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-pg";
+};
+
+®_aldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-pll-avcc";
+};
+
+®_dc1sw {
+ regulator-name = "vcc-phy";
+};
+
+®_dcdc1 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-3v3";
+};
+
+®_dcdc2 {
+ regulator-always-on;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1360000>;
+ regulator-name = "vdd-cpux-a";
+};
+
+®_dcdc3 {
+ regulator-always-on;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1360000>;
+ regulator-name = "vdd-cpux-b";
+};
+
+/* DCDC3 is polyphased with DCDC2 */
+
+/*
+ * The DRAM chips used by rbs-h5 boards are DDR3 -compatibl
+ *
+ */
+®_dcdc5 {
+ regulator-always-on;
+ regulator-min-microvolt = <1500000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-name = "vcc-dram";
+};
+
+®_dldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-1";
+};
+
+®_dldo2 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-2";
+};
+
+®_dldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-3";
+};
+
+®_dldo4 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-4";
+};
+ /* VCC-wifi-IO 1.8 */
+®_eldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-wifi-io-1";
+};
+
+®_eldo2 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-wifi-io-2";
+};
+
+®_eldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-wifi-io-3";
+};
+
+
+
+®_rtc_ldo {
+ regulator-name = "vcc-rtc";
+};
+
+&spi0 {
+ pinctrl-names = "default", "default";
+ pinctrl-1 = <&spi0_cs1>;
+ cs-gpios = <0>, <&pio 0 3 0>; /* PA3 */
+
+ status = "okay";
+ spidev@0 {
+ compatible = "rohm,dh2228fv";
+ status = "okay";
+ reg = <0>;
+ spi-max-frequency = <1000000>;
+ };
+ spidev@1 {
+ compatible = "rohm,dh2228fv";
+ status = "okay";
+ reg = <1>;
+ spi-max-frequency = <1000000>;
+ };
+};
+
+&spi1 {
+ pinctrl-names = "default", "default";
+
+ status = "okay";
+ spidev@0 {
+ compatible = "rohm,dh2228fv";
+ status = "okay";
+ reg = <0>;
+ spi-max-frequency = <1000000>;
+ };
+};
+
+&pio {
+ spi0_cs1: spi0_cs1 {
+ pins = "PA3";
+ function = "gpio_out";
+ output-high;
+ };
+};
+
+
+&r_pwm {
+ status = "disabled";
+};
+
+/* to debag serial */
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pa_pins>;
+ status = "okay";
+};
+
+/* to bt-wifi module */
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
+ uart-has-rtscts;
+ status = "okay";
+
+
+
+};
+
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2_pins>;
+ status = "okay";
+};
+
+&r_uart {
+ pinctrl-names = "default";
+ pinctrl-0 = <&r_uart_pins>;
+ status = "okay";
+};
+
+&usb_otg {
+ dr_mode = "host";
+ status = "okay";
+};
+
+&usbphy {
+ status = "okay";
+};
+
+
Index: create-2022.10-repka-pi3-patch/u-boot-2022.10-new/arch/arm/dts/sun50i-h5-repka-pi3-alt.dts
===================================================================
--- create-2022.10-repka-pi3-patch/u-boot-2022.10-new/arch/arm/dts/sun50i-h5-repka-pi3-alt.dts (nonexistent)
+++ create-2022.10-repka-pi3-patch/u-boot-2022.10-new/arch/arm/dts/sun50i-h5-repka-pi3-alt.dts (revision 146)
@@ -0,0 +1,407 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+// Copyright (C) 2016 ARM Ltd.
+
+/dts-v1/;
+#include "sun50i-h5.dtsi"
+#include "sun50i-h5-cpu-opp.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/sun4i-a10.h>
+
+/ {
+ model = "Repka-Pi3-H5";
+ compatible = "xunlong,orangepi-pc2", "allwinner,sun50i-h5";
+
+ reg_vcc3v3: vcc3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ aliases {
+ ethernet0 = &emac;
+ serial0 = &uart0;
+ serial1 = &uart1;
+ spi0 = &spi0;
+ spi1 = &spi1;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
+ ext_osc32k: ext_osc32k_clk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <32768>;
+ clock-output-names = "ext_osc32k";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ status {
+ label = "rbs:red:status";
+ gpios = <&pio 0 20 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&r_pio 0 8 GPIO_ACTIVE_LOW>;
+ post-power-on-delay-ms = <200>;
+ };
+
+};
+
+&codec {
+ allwinner,audio-routing =
+ "Line Out", "LINEOUT",
+ "MIC1", "Mic",
+ "Mic", "MBIAS";
+ status = "okay";
+};
+
+&cpu0 {
+ cpu-supply = <®_dcdc2>;
+};
+
+&cpu1 {
+ cpu-supply = <®_dcdc2>;
+};
+
+&cpu2 {
+ cpu-supply = <®_dcdc2>;
+};
+
+&cpu3 {
+ cpu-supply = <®_dcdc2>;
+};
+
+&de {
+ status = "okay";
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+&ehci2 {
+ status = "okay";
+};
+
+&ehci3 {
+ status = "okay";
+};
+
+&emac {
+ phy-handle = <&int_mii_phy>;
+ phy-mode = "mii";
+ allwinner,leds-active-low;
+ status = "okay";
+};
+
+&hdmi {
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
+&ir {
+ pinctrl-names = "default";
+ pinctrl-0 = <&r_ir_rx_pin>;
+ status = "disabled";
+};
+
+&rtc {
+ clocks = <&ext_osc32k>;
+};
+
+&mmc0 {
+ vmmc-supply = <®_vcc3v3>;
+ bus-width = <4>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+ status = "okay";
+};
+
+&mmc1 {
+ vmmc-supply = <®_vcc3v3>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ bus-width = <4>;
+ non-removable;
+ status = "okay";
+
+ brcmf: wifi@1 {
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
+ interrupt-parent = <&r_pio>;
+ interrupts = <0 7 IRQ_TYPE_LEVEL_LOW>; /* PL7 */
+ interrupt-names = "host-wake";
+ };
+
+};
+
+&mmc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_8bit_pins>;
+ vmmc-supply = <®_vcc3v3>;
+ bus-width = <8>;
+ non-removable;
+ cap-mmc-hw-reset;
+ status = "disabled";
+};
+
+&ohci0 {
+ status = "okay";
+};
+
+&ohci1 {
+ status = "okay";
+};
+
+&ohci2 {
+ status = "okay";
+};
+
+&ohci3 {
+ status = "okay";
+};
+
+&i2c1 {
+ status = "disabled"; /* PA19,PA18 */
+};
+
+&i2c0 {
+ status = "okay"; /* PA11, PA12 */
+};
+
+&r_i2c {
+ status = "okay";
+
+ axp22x: pmic@34 {
+ compatible = "x-powers,axp221";
+ reg = <0x34>;
+ interrupt-parent = <&r_intc>;
+ interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+ };
+};
+
+#include "axp22x.dtsi"
+
+&ac_power_supply {
+ status = "okay";
+};
+
+®_aldo2 { /* VCC-PG 1.8 */
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-pg";
+};
+
+®_aldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-pll-avcc";
+};
+
+®_dc1sw {
+ regulator-name = "vcc-phy";
+};
+
+®_dcdc1 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-3v3";
+};
+
+®_dcdc2 {
+ regulator-always-on;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1360000>;
+ regulator-name = "vdd-cpux-a";
+};
+
+®_dcdc3 {
+ regulator-always-on;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1360000>;
+ regulator-name = "vdd-cpux-b";
+};
+
+/* DCDC3 is polyphased with DCDC2 */
+
+/*
+ * The DRAM chips used by rbs-h5 boards are DDR3 -compatibl
+ *
+ */
+®_dcdc5 {
+ regulator-always-on;
+ regulator-min-microvolt = <1500000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-name = "vcc-dram";
+};
+
+®_dldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-1";
+};
+
+®_dldo2 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-2";
+};
+
+®_dldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-3";
+};
+
+®_dldo4 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-4";
+};
+ /* VCC-wifi-IO 1.8 */
+®_eldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-wifi-io-1";
+};
+
+®_eldo2 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-wifi-io-2";
+};
+
+®_eldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-wifi-io-3";
+};
+
+
+®_rtc_ldo {
+ regulator-name = "vcc-rtc";
+};
+
+&spi0 {
+ pinctrl-names = "default", "default";
+ pinctrl-1 = <&spi0_cs1>;
+ cs-gpios = <0>, <&pio 0 3 0>; /* PA3 */
+
+ status = "okay";
+ spidev@0 {
+ compatible = "rohm,dh2228fv";
+ status = "okay";
+ reg = <0>;
+ spi-max-frequency = <1000000>;
+ };
+ spidev@1 {
+ compatible = "rohm,dh2228fv";
+ status = "okay";
+ reg = <1>;
+ spi-max-frequency = <1000000>;
+ };
+};
+
+&spi1 {
+ pinctrl-names = "default", "default";
+
+ status = "okay";
+ spidev@0 {
+ compatible = "rohm,dh2228fv";
+ status = "okay";
+ reg = <0>;
+ spi-max-frequency = <1000000>;
+ };
+};
+
+&pio {
+ spi0_cs1: spi0_cs1 {
+ pins = "PA3";
+ function = "gpio_out";
+ output-high;
+ };
+};
+
+
+&r_pwm {
+ status = "disabled";
+};
+
+/* to debag serial */
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pa_pins>;
+ status = "okay";
+};
+
+/* to bt-wifi module */
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
+ uart-has-rtscts;
+ status = "okay";
+
+
+
+};
+
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2_pins>, <&uart2_rts_cts_pins>;
+ status = "disabled";
+};
+
+&r_uart {
+ pinctrl-names = "default";
+ pinctrl-0 = <&r_uart_pins>;
+ status = "disabled";
+};
+
+&usb_otg {
+ dr_mode = "host";
+ status = "okay";
+};
+
+&usbphy {
+ status = "okay";
+};
+
+
Index: create-2022.10-repka-pi3-patch/u-boot-2022.10-new/arch/arm/dts/sun50i-h5-repka-pi3.dts
===================================================================
--- create-2022.10-repka-pi3-patch/u-boot-2022.10-new/arch/arm/dts/sun50i-h5-repka-pi3.dts (nonexistent)
+++ create-2022.10-repka-pi3-patch/u-boot-2022.10-new/arch/arm/dts/sun50i-h5-repka-pi3.dts (revision 146)
@@ -0,0 +1,414 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+// Copyright (C) 2016 ARM Ltd.
+
+/dts-v1/;
+#include "sun50i-h5.dtsi"
+#include "sun50i-h5-cpu-opp-1.0ghz.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/sun4i-a10.h>
+
+/ {
+ model = "Repka-Pi3-H5";
+ compatible = "xunlong,orangepi-pc2", "allwinner,sun50i-h5";
+
+ reg_vcc3v3: vcc3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ aliases {
+ ethernet0 = &emac;
+ serial0 = &uart0;
+ serial1 = &uart1;
+ spi0 = &spi0;
+ spi1 = &spi1;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
+ ext_osc32k: ext_osc32k_clk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <32768>;
+ clock-output-names = "ext_osc32k";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ status {
+ label = "rbs:red:status";
+ gpios = <&pio 0 20 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&r_pio 0 8 GPIO_ACTIVE_LOW>;
+ post-power-on-delay-ms = <200>;
+ };
+
+};
+
+&codec {
+ allwinner,audio-routing =
+ "Line Out", "LINEOUT",
+ "MIC1", "Mic",
+ "Mic", "MBIAS";
+ status = "okay";
+};
+
+&cpu0 {
+ cpu-supply = <®_dcdc2>;
+};
+
+&cpu1 {
+ cpu-supply = <®_dcdc2>;
+};
+
+&cpu2 {
+ cpu-supply = <®_dcdc2>;
+};
+
+&cpu3 {
+ cpu-supply = <®_dcdc2>;
+};
+
+&de {
+ status = "okay";
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+&ehci2 {
+ status = "okay";
+};
+
+&ehci3 {
+ status = "okay";
+};
+
+&emac {
+ phy-handle = <&int_mii_phy>;
+ phy-mode = "mii";
+ allwinner,leds-active-low;
+ status = "okay";
+};
+
+&hdmi {
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
+&ir {
+ pinctrl-names = "default";
+ pinctrl-0 = <&r_ir_rx_pin>;
+ status = "disabled";
+};
+
+&rtc {
+ clocks = <&ext_osc32k>;
+};
+
+&mmc0 {
+ vmmc-supply = <®_vcc3v3>;
+ bus-width = <4>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+ status = "okay";
+};
+
+&mmc1 {
+ vmmc-supply = <®_vcc3v3>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ bus-width = <4>;
+ non-removable;
+ status = "okay";
+
+ brcmf: wifi@1 {
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
+ interrupt-parent = <&r_pio>;
+ interrupts = <0 7 IRQ_TYPE_LEVEL_LOW>; /* PL7 */
+ interrupt-names = "host-wake";
+ };
+
+};
+
+&mmc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_8bit_pins>;
+ vmmc-supply = <®_vcc3v3>;
+ bus-width = <8>;
+ non-removable;
+ cap-mmc-hw-reset;
+ status = "disabled";
+};
+
+&ohci0 {
+ status = "okay";
+};
+
+&ohci1 {
+ status = "okay";
+};
+
+&ohci2 {
+ status = "okay";
+};
+
+&ohci3 {
+ status = "okay";
+};
+
+&i2c1 {
+ status = "disabled"; /* PA19,PA18 */
+};
+
+&i2c0 {
+ status = "disabled"; /* PA11, PA12 */
+};
+
+&r_i2c {
+ status = "okay";
+
+ axp22x: pmic@34 {
+ compatible = "x-powers,axp221";
+ reg = <0x34>;
+ interrupt-parent = <&r_intc>;
+ interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+ };
+};
+
+#include "axp22x.dtsi"
+
+&ac_power_supply {
+ status = "okay";
+};
+
+®_aldo2 { /* VCC-PG 1.8 */
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-pg";
+};
+
+®_aldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-pll-avcc";
+};
+
+®_dc1sw {
+ regulator-name = "vcc-phy";
+};
+
+®_dcdc1 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-3v3";
+};
+
+®_dcdc2 {
+ regulator-always-on;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1360000>;
+ regulator-name = "vdd-cpux-a";
+};
+
+®_dcdc3 {
+ regulator-always-on;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1360000>;
+ regulator-name = "vdd-cpux-b";
+};
+
+/* DCDC3 is polyphased with DCDC2 */
+
+/*
+ * The DRAM chips used by rbs-h5 boards are DDR3 -compatibl
+ *
+ */
+®_dcdc5 {
+ regulator-always-on;
+ regulator-min-microvolt = <1500000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-name = "vcc-dram";
+};
+
+®_dldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-1";
+};
+
+®_dldo2 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-2";
+};
+
+®_dldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-3";
+};
+
+®_dldo4 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-4";
+};
+ /* VCC-wifi-IO 1.8 */
+®_eldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-wifi-io-1";
+};
+
+®_eldo2 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-wifi-io-2";
+};
+
+®_eldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-wifi-io-3";
+};
+
+/*
+ *
+ *
+ * ^__________^
+*
+*
+*/
+
+®_rtc_ldo {
+ regulator-name = "vcc-rtc";
+};
+
+&spi0 {
+ pinctrl-names = "default", "default";
+ pinctrl-1 = <&spi0_cs1>;
+ cs-gpios = <0>, <&pio 0 3 0>; /* PA3 */
+
+ status = "disabled";
+ spidev@0 {
+ compatible = "rohm,dh2228fv";
+ status = "okay";
+ reg = <0>;
+ spi-max-frequency = <1000000>;
+ };
+ spidev@1 {
+ compatible = "rohm,dh2228fv";
+ status = "okay";
+ reg = <1>;
+ spi-max-frequency = <1000000>;
+ };
+};
+
+&spi1 {
+ pinctrl-names = "default", "default";
+
+ status = "disabled";
+ spidev@0 {
+ compatible = "rohm,dh2228fv";
+ status = "okay";
+ reg = <0>;
+ spi-max-frequency = <1000000>;
+ };
+};
+
+&pio {
+ spi0_cs1: spi0_cs1 {
+ pins = "PA3";
+ function = "gpio_out";
+ output-high;
+ };
+};
+
+
+&r_pwm {
+ status = "disabled";
+};
+
+/* to debag serial */
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pa_pins>;
+ status = "okay";
+};
+
+/* to bt-wifi module */
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
+ uart-has-rtscts;
+ status = "okay";
+
+
+
+};
+
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2_pins>, <&uart2_rts_cts_pins>;
+ status = "disabled";
+};
+
+&r_uart {
+ pinctrl-names = "default";
+ pinctrl-0 = <&r_uart_pins>;
+ status = "disabled";
+};
+
+&usb_otg {
+ dr_mode = "host";
+ status = "okay";
+};
+
+&usbphy {
+ status = "okay";
+};
+
+
Index: create-2022.10-repka-pi3-patch/u-boot-2022.10-new/arch/arm/dts/sun50i-h5.dtsi
===================================================================
--- create-2022.10-repka-pi3-patch/u-boot-2022.10-new/arch/arm/dts/sun50i-h5.dtsi (nonexistent)
+++ create-2022.10-repka-pi3-patch/u-boot-2022.10-new/arch/arm/dts/sun50i-h5.dtsi (revision 146)
@@ -0,0 +1,339 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+// Copyright (C) 2016 ARM Ltd.
+
+#include <sunxi-h3-h5.dtsi>
+
+#include <dt-bindings/thermal/thermal.h>
+
+/ {
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu0: cpu@0 {
+ compatible = "arm,cortex-a53";
+ device_type = "cpu";
+ reg = <0>;
+ enable-method = "psci";
+ clocks = <&ccu CLK_CPUX>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ #cooling-cells = <2>;
+ };
+
+ cpu1: cpu@1 {
+ compatible = "arm,cortex-a53";
+ device_type = "cpu";
+ reg = <1>;
+ enable-method = "psci";
+ clocks = <&ccu CLK_CPUX>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ #cooling-cells = <2>;
+ };
+
+ cpu2: cpu@2 {
+ compatible = "arm,cortex-a53";
+ device_type = "cpu";
+ reg = <2>;
+ enable-method = "psci";
+ clocks = <&ccu CLK_CPUX>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ #cooling-cells = <2>;
+ };
+
+ cpu3: cpu@3 {
+ compatible = "arm,cortex-a53";
+ device_type = "cpu";
+ reg = <3>;
+ enable-method = "psci";
+ clocks = <&ccu CLK_CPUX>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ #cooling-cells = <2>;
+ };
+ };
+
+ pmu {
+ compatible = "arm,cortex-a53-pmu";
+ interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
+ };
+
+ psci {
+ compatible = "arm,psci-0.2";
+ method = "smc";
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ arm,no-tick-in-suspend;
+ interrupts = <GIC_PPI 13
+ (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 14
+ (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 11
+ (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 10
+ (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+ };
+
+ soc {
+ syscon: system-control@1c00000 {
+ compatible = "allwinner,sun50i-h5-system-control";
+ reg = <0x01c00000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ sram_c1: sram@18000 {
+ compatible = "mmio-sram";
+ reg = <0x00018000 0x1c000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x00018000 0x1c000>;
+
+ ve_sram: sram-section@0 {
+ compatible = "allwinner,sun50i-h5-sram-c1",
+ "allwinner,sun4i-a10-sram-c1";
+ reg = <0x000000 0x1c000>;
+ };
+ };
+ };
+
+ video-codec@1c0e000 {
+ compatible = "allwinner,sun50i-h5-video-engine";
+ reg = <0x01c0e000 0x1000>;
+ clocks = <&ccu CLK_BUS_VE>, <&ccu CLK_VE>,
+ <&ccu CLK_DRAM_VE>;
+ clock-names = "ahb", "mod", "ram";
+ resets = <&ccu RST_BUS_VE>;
+ interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
+ allwinner,sram = <&ve_sram 1>;
+ };
+
+ crypto: crypto@1c15000 {
+ compatible = "allwinner,sun50i-h5-crypto";
+ reg = <0x01c15000 0x1000>;
+ interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_CE>, <&ccu CLK_CE>;
+ clock-names = "bus", "mod";
+ resets = <&ccu RST_BUS_CE>;
+ };
+
+ deinterlace: deinterlace@1e00000 {
+ compatible = "allwinner,sun8i-h3-deinterlace";
+ reg = <0x01e00000 0x20000>;
+ clocks = <&ccu CLK_BUS_DEINTERLACE>,
+ <&ccu CLK_DEINTERLACE>,
+ <&ccu CLK_DRAM_DEINTERLACE>;
+ clock-names = "bus", "mod", "ram";
+ resets = <&ccu RST_BUS_DEINTERLACE>;
+ interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
+ interconnects = <&mbus 9>;
+ interconnect-names = "dma-mem";
+ };
+
+ mali: gpu@1e80000 {
+ compatible = "allwinner,sun50i-h5-mali", "arm,mali-450";
+ reg = <0x01e80000 0x30000>;
+ /*
+ * While the datasheet lists an interrupt for the
+ * PMU, the actual silicon does not have the PMU
+ * block. Reads all return zero, and writes are
+ * ignored.
+ */
+ interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "gp",
+ "gpmmu",
+ "pp",
+ "pp0",
+ "ppmmu0",
+ "pp1",
+ "ppmmu1",
+ "pp2",
+ "ppmmu2",
+ "pp3",
+ "ppmmu3";
+ clocks = <&ccu CLK_BUS_GPU>, <&ccu CLK_GPU>;
+ clock-names = "bus", "core";
+ resets = <&ccu RST_BUS_GPU>;
+
+ assigned-clocks = <&ccu CLK_GPU>;
+ assigned-clock-rates = <384000000>;
+ };
+
+ ths: thermal-sensor@1c25000 {
+ compatible = "allwinner,sun50i-h5-ths";
+ reg = <0x01c25000 0x400>;
+ interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&ccu RST_BUS_THS>;
+ clocks = <&ccu CLK_BUS_THS>, <&ccu CLK_THS>;
+ clock-names = "bus", "mod";
+ nvmem-cells = <&ths_calibration>;
+ nvmem-cell-names = "calibration";
+ #thermal-sensor-cells = <1>;
+ };
+ };
+
+ thermal-zones {
+ cpu_thermal: cpu-thermal {
+ /* milliseconds */
+ polling-delay-passive = <250>;
+ polling-delay = <1000>;
+ thermal-sensors = <&ths 0>;
+
+ trips {
+ cpu_warm: cpu_warm {
+ temperature = <55000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu_hot0: cpu_hot0 {
+ temperature = <60000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu_hot1: cpu_hot1 {
+ temperature = <65000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu_very_hot0: cpu_very_hot0 {
+ temperature = <70000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu_very_hot1: cpu_very_hot1 {
+ temperature = <75000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu_very_hot2: cpu_very_hot2 {
+ temperature = <80000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu_very_hot3: cpu_very_hot3 {
+ temperature = <85000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu_crit: cpu_crit {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+
+ cooling-maps {
+ cpu_warm_limit_cpu {
+ trip = <&cpu_warm>;
+ cooling-device = <&cpu0 THERMAL_NO_LIMIT 1>;
+ };
+
+ cpu_hot_limit_cpu0 {
+ trip = <&cpu_hot0>;
+ cooling-device = <&cpu0 1 2>;
+ };
+
+ cpu_hot_limit_cpu1 {
+ trip = <&cpu_hot1>;
+ cooling-device = <&cpu0 2 3>;
+ };
+
+ cpu_very_hot_limit_cpu0 {
+ trip = <&cpu_very_hot0>;
+ cooling-device = <&cpu0 3 4>;
+ };
+
+ cpu_very_hot_limit_cpu1 {
+ trip = <&cpu_very_hot1>;
+ cooling-device = <&cpu0 4 5>;
+ };
+
+ cpu_very_hot_limit_cpu2 {
+ trip = <&cpu_very_hot2>;
+ cooling-device = <&cpu0 5 6>;
+ };
+
+ cpu_very_hot_limit_cpu3 {
+ trip = <&cpu_very_hot3>;
+ cooling-device = <&cpu0 7 THERMAL_NO_LIMIT>;
+ };
+
+ };
+ };
+
+ gpu-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-sensors = <&ths 1>;
+ };
+ };
+};
+
+&ccu {
+ compatible = "allwinner,sun50i-h5-ccu";
+};
+
+&display_clocks {
+ compatible = "allwinner,sun50i-h5-de2-clk";
+};
+
+&mbus {
+ compatible = "allwinner,sun50i-h5-mbus";
+};
+
+&mmc0 {
+ compatible = "allwinner,sun50i-h5-mmc",
+ "allwinner,sun50i-a64-mmc";
+ clocks = <&ccu CLK_BUS_MMC0>, <&ccu CLK_MMC0>;
+ clock-names = "ahb", "mmc";
+};
+
+&mmc1 {
+ compatible = "allwinner,sun50i-h5-mmc",
+ "allwinner,sun50i-a64-mmc";
+ clocks = <&ccu CLK_BUS_MMC1>, <&ccu CLK_MMC1>;
+ clock-names = "ahb", "mmc";
+};
+
+&mmc2 {
+ compatible = "allwinner,sun50i-h5-emmc",
+ "allwinner,sun50i-a64-emmc";
+ clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>;
+ clock-names = "ahb", "mmc";
+};
+
+&pio {
+ interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
+ compatible = "allwinner,sun50i-h5-pinctrl";
+};
+
+&rtc {
+ compatible = "allwinner,sun50i-h5-rtc";
+};
+
+&sid {
+ compatible = "allwinner,sun50i-h5-sid";
+};
Index: create-2022.10-repka-pi3-patch/u-boot-2022.10-new/configs/repka-pi3_defconfig
===================================================================
--- create-2022.10-repka-pi3-patch/u-boot-2022.10-new/configs/repka-pi3_defconfig (nonexistent)
+++ create-2022.10-repka-pi3-patch/u-boot-2022.10-new/configs/repka-pi3_defconfig (revision 146)
@@ -0,0 +1,23 @@
+CONFIG_ARM=y
+CONFIG_ARCH_SUNXI=y
+CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-repka-pi3"
+CONFIG_SPL=y
+CONFIG_MACH_SUN50I_H5=y
+CONFIG_DRAM_CLK=672
+CONFIG_DRAM_ZQ=3881977
+CONFIG_SYS_CLK_FREQ=312000000
+# CONFIG_DRAM_ODT_EN is not set
+CONFIG_SPL_SPI_SUNXI=y
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SPL_STACK=0x54000
+CONFIG_SPL_I2C=y
+CONFIG_SYS_PBSIZE=1024
+CONFIG_SYS_BOOTM_LEN=0x2000000
+# CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
+CONFIG_SUN8I_EMAC=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_OHCI_HCD=y
+# CONFIG_USB_MUSB_GADGET=y
Index: create-2022.10-repka-pi3-patch/u-boot-2022.10-new/drivers/power/Kconfig
===================================================================
--- create-2022.10-repka-pi3-patch/u-boot-2022.10-new/drivers/power/Kconfig (nonexistent)
+++ create-2022.10-repka-pi3-patch/u-boot-2022.10-new/drivers/power/Kconfig (revision 146)
@@ -0,0 +1,455 @@
+menuconfig POWER
+ bool "Power"
+ default y
+ help
+ Enable support for power control in U-Boot. This includes support
+ for PMICs (Power-management Integrated Circuits) and some of the
+ features provided by PMICs. In particular, voltage regulators can
+ be used to enable/disable power and vary its voltage. That can be
+ useful in U-Boot to turn on boot peripherals and adjust CPU voltage
+ so that the clock speed can be increased. This enables the drivers
+ in drivers/power, drivers/power/pmic and drivers/power/regulator
+ as part of a build.
+
+if POWER
+
+config POWER_LEGACY
+ bool "Legacy power support"
+ help
+ Note: This is a legacy option. Use DM_PMIC instead.
+
+ Enable support for power control in U-Boot. This includes support
+ for PMICs (Power-management Integrated Circuits) and some of the
+ features provided by PMICs. In particular, voltage regulators can
+ be used to enable/disable power and vary its voltage. That can be
+ useful in U-Boot to turn on boot peripherals and adjust CPU voltage
+ so that the clock speed can be increased. This enables the drivers
+ in drivers/power, drivers/power/pmic and drivers/power/regulator
+ as part of a build.
+
+config SPL_POWER_LEGACY
+ bool "Legacy power support in SPL"
+ depends on SPL && !SPL_DM_PMIC
+ default y if POWER_LEGACY
+ help
+ Note: This is a legacy option. Use SPL_DM_PMIC instead.
+
+ Enable support for power control in SPL. This includes support
+ for PMICs (Power-management Integrated Circuits) and some of the
+ features provided by PMICs. In particular, voltage regulators can
+ be used to enable/disable power and vary its voltage. That can be
+ useful in SPL to turn on boot peripherals and adjust CPU voltage
+ so that the clock speed can be increased. This enables the drivers
+ in drivers/power, drivers/power/pmic and drivers/power/regulator
+ as part of a build.
+
+source "drivers/power/acpi_pmc/Kconfig"
+
+source "drivers/power/domain/Kconfig"
+
+source "drivers/power/pmic/Kconfig"
+
+source "drivers/power/regulator/Kconfig"
+
+choice
+ prompt "Select Sunxi PMIC Variant"
+ depends on ARCH_SUNXI
+ default AXP209_POWER if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
+ default AXP221_POWER if MACH_SUN6I || MACH_SUN8I_A23 || MACH_SUN8I_A33 || MACH_SUN8I_R40
+ default AXP305_POWER if MACH_SUN50I_H616
+ default AXP818_POWER if MACH_SUN8I_A83T
+ default SUNXI_NO_PMIC if MACH_SUNXI_H3_H5 || MACH_SUN50I || MACH_SUN8I_V3S
+
+config SUNXI_NO_PMIC
+ bool "board without a pmic"
+ ---help---
+ Select this for boards which do not use a PMIC.
+
+config AXP152_POWER
+ bool "axp152 pmic support"
+ depends on MACH_SUN5I
+ select AXP_PMIC_BUS
+ select CMD_POWEROFF
+ ---help---
+ Select this to enable support for the axp152 pmic found on most
+ A10s boards.
+
+config AXP209_POWER
+ bool "axp209 pmic support"
+ depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUN8I_V3S
+ select AXP_PMIC_BUS
+ select CMD_POWEROFF
+ ---help---
+ Select this to enable support for the axp209 pmic found on most
+ A10, A13 and A20 boards.
+
+config AXP221_POWER
+ bool "axp221 / axp223 pmic support"
+ depends on MACH_SUN6I || MACH_SUN8I_A23 || MACH_SUN8I_A33 || MACH_SUN8I_R40 || MACH_SUNXI_H3_H5 || MACH_SUN50I
+ select AXP_PMIC_BUS
+ select CMD_POWEROFF
+ ---help---
+ Select this to enable support for the axp221/axp223 pmic found on most
+ A23 and A31 boards and Repka PI :))) .
+
+config AXP305_POWER
+ bool "axp305 pmic support"
+ depends on MACH_SUN50I_H616
+ select AXP_PMIC_BUS
+ select CMD_POWEROFF
+ ---help---
+ Select this to enable support for the axp305 pmic found on most
+ H616 boards.
+
+config AXP809_POWER
+ bool "axp809 pmic support"
+ depends on MACH_SUN9I
+ select AXP_PMIC_BUS
+ select CMD_POWEROFF
+ ---help---
+ Say y here to enable support for the axp809 pmic found on A80 boards.
+
+config AXP818_POWER
+ bool "axp818 pmic support"
+ depends on MACH_SUN8I_A83T
+ select AXP_PMIC_BUS
+ select CMD_POWEROFF
+ ---help---
+ Say y here to enable support for the axp818 pmic found on
+ A83T dev board.
+
+config SY8106A_POWER
+ bool "SY8106A pmic support"
+ depends on MACH_SUNXI_H3_H5
+ ---help---
+ Select this to enable support for the SY8106A pmic found on some
+ H3 boards.
+
+endchoice
+
+config AXP_DCDC1_VOLT
+ int "axp pmic dcdc1 voltage"
+ depends on AXP221_POWER || AXP809_POWER || AXP818_POWER
+ default 3300 if AXP818_POWER || MACH_SUN8I_R40 || MACH_SUNXI_H3_H5 || MACH_SUN50I
+ default 3000 if MACH_SUN6I || MACH_SUN8I || MACH_SUN9I
+ ---help---
+ Set the voltage (mV) to program the axp pmic dcdc1 at, set to 0 to
+ disable dcdc1. On A23 / A31 / A33 (axp221) boards dcdc1 is used for
+ generic 3.3V IO voltage for external devices like the lcd-panal and
+ sdcard interfaces, etc. On most boards dcdc1 is undervolted to 3.0V to
+ save battery. On A31 devices dcdc1 is also used for VCC-IO. On A83T
+ dcdc1 is used for VCC-IO, nand, usb0, sd , etc. On A80 dcdc1 normally
+ powers some of the pingroups, NAND/eMMC, SD/MMC, and USB OTG.
+
+config AXP_DCDC2_VOLT
+ int "axp pmic dcdc2 voltage"
+ depends on AXP152_POWER || AXP209_POWER || AXP221_POWER || AXP809_POWER || AXP818_POWER
+ default 900 if AXP818_POWER
+ default 1400 if AXP152_POWER || AXP209_POWER
+ default 1200 if MACH_SUN6I
+ default 1000 if MACH_SUN8I || MACH_SUNXI_H3_H5 || MACH_SUN50I
+ default 0 if MACH_SUN9I
+ ---help---
+ Set the voltage (mV) to program the axp pmic dcdc2 at, set to 0 to
+ disable dcdc2.
+ On A10(s) / A13 / A20 boards dcdc2 is VDD-CPU and should be 1.4V.
+ On A31 boards dcdc2 is used for VDD-GPU and should be 1.2V.
+ On A23/A33 boards dcdc2 is used for VDD-SYS and should be 1.1V.
+ On A80 boards dcdc2 powers the GPU and can be left off.
+ On A83T boards dcdc2 is used for VDD-CPUA(cluster 0) and should be 0.9V.
+ On R40 boards dcdc2 is VDD-CPU and should be 1.1V
+
+config AXP_DCDC3_VOLT
+ int "axp pmic dcdc3 voltage"
+ depends on AXP152_POWER || AXP209_POWER || AXP221_POWER || AXP809_POWER || AXP818_POWER
+ default 900 if AXP809_POWER || AXP818_POWER
+ default 1500 if AXP152_POWER
+ default 1250 if AXP209_POWER
+ default 1000 if MACH_SUN8I_R40 || MACH_SUNXI_H3_H5 || MACH_SUN50I
+ default 1200 if MACH_SUN6I || MACH_SUN8I
+ ---help---
+ Set the voltage (mV) to program the axp pmic dcdc3 at, set to 0 to
+ disable dcdc3.
+ On A10(s) / A13 / A20 boards with an axp209 dcdc3 is VDD-INT-DLL and
+ should be 1.25V.
+ On A10s boards with an axp152 dcdc3 is VCC-DRAM and should be 1.5V.
+ On A23 / A31 / A33 boards dcdc3 is VDD-CPU and should be 1.2V.
+ On A80 boards dcdc3 is used for VDD-CPUA(cluster 0) and should be 0.9V.
+ On A83T boards dcdc3 is used for VDD-CPUB(cluster 1) and should be 0.9V.
+ On R40 boards dcdc3 is VDD-SYS and VDD-GPU and should be 1.1V.
+
+config AXP_DCDC4_VOLT
+ int "axp pmic dcdc4 voltage"
+ depends on AXP152_POWER || AXP221_POWER || AXP809_POWER || AXP818_POWER || AXP305_POWER
+ default 1250 if AXP152_POWER
+ default 1200 if MACH_SUN6I
+ default 0 if MACH_SUN8I || MACH_SUNXI_H3_H5 || MACH_SUN50I
+ default 900 if MACH_SUN9I
+ default 1500 if AXP305_POWER
+ ---help---
+ Set the voltage (mV) to program the axp pmic dcdc4 at, set to 0 to
+ disable dcdc4.
+ On A10s boards with an axp152 dcdc4 is VDD-INT-DLL and should be 1.25V.
+ On A31 boards dcdc4 is used for VDD-SYS and should be 1.2V.
+ On A23 / A33 boards dcdc4 is unused and should be disabled.
+ On A80 boards dcdc4 powers VDD-SYS, HDMI, USB OTG and should be 0.9V.
+ On A83T boards dcdc4 is used for VDD-GPU.
+ On H616 boards dcdcd is used for VCC-DRAM.
+
+config AXP_DCDC5_VOLT
+ int "axp pmic dcdc5 voltage"
+ depends on AXP221_POWER || AXP809_POWER || AXP818_POWER
+ default 1500 if MACH_SUN6I || MACH_SUN8I || MACH_SUN9I || MACH_SUNXI_H3_H5 || MACH_SUN50I
+ ---help---
+ Set the voltage (mV) to program the axp pmic dcdc5 at, set to 0 to
+ disable dcdc5.
+ On A23 / A31 / A33 / A80 / A83T / R40 boards dcdc5 is VCC-DRAM and
+ should be 1.5V, 1.35V if DDR3L is used.
+
+config AXP_ALDO1_VOLT
+ int "axp pmic (a)ldo1 voltage"
+ depends on AXP221_POWER || AXP809_POWER || AXP818_POWER
+ default 0 if MACH_SUN6I || MACH_SUN8I_R40 || MACH_SUNXI_H3_H5 || MACH_SUN50I
+ default 1800 if MACH_SUN8I_A83T
+ default 3000 if MACH_SUN8I || MACH_SUN9I
+ ---help---
+ Set the voltage (mV) to program the axp pmic aldo1 at, set to 0 to
+ disable aldo1.
+ On A31 boards aldo1 is often used to power the wifi module.
+ On A23 / A33 boards aldo1 is used for VCC-IO and should be 3.0V.
+ On A80 boards aldo1 powers the USB hosts and should be 3.0V.
+ On A83T / H8 boards aldo1 is used for MIPI CSI, DSI, HDMI, EFUSE, and
+ should be 1.8V.
+
+config AXP_ALDO2_VOLT
+ int "axp pmic (a)ldo2 voltage"
+ depends on AXP152_POWER || AXP209_POWER || AXP221_POWER || AXP809_POWER || AXP818_POWER
+ default 3000 if AXP152_POWER || AXP209_POWER
+ default 0 if MACH_SUN6I || MACH_SUN9I
+ default 1800 if MACH_SUN8I_A83T || MACH_SUNXI_H3_H5 || MACH_SUN50I
+ default 2500 if MACH_SUN8I
+ ---help---
+ Set the voltage (mV) to program the axp pmic aldo2 at, set to 0 to
+ disable aldo2.
+ On A10(s) / A13 / A20 boards aldo2 is AVCC and should be 3.0V.
+ On A31 boards aldo2 is typically unused and should be disabled.
+ On A31 boards aldo2 may be used for LPDDR2 then it should be 1.8V.
+ On A23 / A33 boards aldo2 is used for VDD-DLL and should be 2.5V.
+ On A80 boards aldo2 powers PB pingroup and camera IO and can be left off.
+ On A83T / H8 boards aldo2 powers VDD-DLL, VCC18-PLL, CPVDD, VDD18-ADC,
+ LPDDR2, and the codec. It should be 1.8V.
+
+config AXP_ALDO3_VOLT
+ int "axp pmic (a)ldo3 voltage"
+ depends on AXP209_POWER || AXP221_POWER || AXP809_POWER || AXP818_POWER
+ default 0 if AXP209_POWER || MACH_SUN9I
+ default 3000 if MACH_SUN6I || MACH_SUN8I
+ default 3300 if MACH_SUNXI_H3_H5 || MACH_SUN50I
+ ---help---
+ Set the voltage (mV) to program the axp pmic aldo3 at, set to 0 to
+ disable aldo3.
+ On A10(s) / A13 / A20 boards aldo3 should be 2.8V.
+ On A23 / A31 / A33 / R40 boards aldo3 is VCC-PLL and AVCC and should
+ be 3.0V.
+ On A80 boards aldo3 is normally not used.
+ On A83T / H8 boards aldo3 is AVCC, VCC-PL, and VCC-LED, and should be
+ 3.0V.
+
+choice
+ prompt "axp pmic (a)ldo3 voltage rate control"
+ depends on AXP209_POWER
+ default AXP_ALDO3_VOLT_SLOPE_NONE
+ ---help---
+ The AXP can slowly ramp up voltage to reduce the inrush current when
+ changing voltages.
+ Note, this does not apply when enabling/disabling LDO3. See
+ "axp pmic (a)ldo3 inrush quirk" below to enable a slew rate to limit
+ inrush current on broken board designs.
+
+config AXP_ALDO3_VOLT_SLOPE_NONE
+ bool "No voltage slope"
+ ---help---
+ Tries to reach the next voltage setting near instantaneously. Measurements
+ indicate that this is about 0.0167 V/uS.
+
+config AXP_ALDO3_VOLT_SLOPE_16
+ bool "1.6 mV per uS"
+ ---help---
+ Increases the voltage by 1.6 mV per uS until the final voltage has
+ been reached. Note that the scaling is in 25 mV steps and thus
+ the slew rate in reality is about 25 mV/31.250 uS.
+
+config AXP_ALDO3_VOLT_SLOPE_08
+ bool "0.8 mV per uS"
+ ---help---
+ Increases the voltage by 0.8 mV per uS until the final voltage has
+ been reached. Note that the scaling is in 25 mV steps however and thus
+ the slew rate in reality is about 25 mV/15.625 uS.
+ This is the slowest supported rate.
+
+endchoice
+
+config AXP_ALDO3_INRUSH_QUIRK
+ bool "axp pmic (a)ldo3 inrush quirk"
+ depends on AXP209_POWER
+ ---help---
+ The reference design denotes a value of 4.7 uF for the output capacitor
+ of LDO3. Some boards have too high capacitance causing an inrush current
+ and resulting an AXP209 shutdown.
+
+config AXP_ALDO4_VOLT
+ int "axp pmic (a)ldo4 voltage"
+ depends on AXP209_POWER
+ default 0 if AXP209_POWER
+ ---help---
+ Set the voltage (mV) to program the axp pmic aldo4 at, set to 0 to
+ disable aldo4.
+ On A10(s) / A13 / A20 boards aldo4 should be 2.8V.
+
+config AXP_DLDO1_VOLT
+ int "axp pmic dldo1 voltage"
+ depends on AXP221_POWER || AXP809_POWER || AXP818_POWER
+ default 0
+ ---help---
+ Set the voltage (mV) to program the axp pmic dldo1 at, set to 0 to
+ disable dldo1. On sun6i (A31) boards with ethernet dldo1 is often used
+ to power the ethernet phy. On A23, A33 and A80 boards this is often
+ used to power the wifi.
+
+config AXP_DLDO2_VOLT
+ int "axp pmic dldo2 voltage"
+ depends on AXP221_POWER || AXP809_POWER || AXP818_POWER
+ default 3000 if MACH_SUN9I
+ default 0
+ ---help---
+ Set the voltage (mV) to program the axp pmic dldo2 at, set to 0 to
+ disable dldo2.
+ On A80 boards dldo2 normally powers the PL pins and should be 3.0V.
+
+config AXP_DLDO3_VOLT
+ int "axp pmic dldo3 voltage"
+ depends on AXP221_POWER || AXP818_POWER
+ default 0
+ ---help---
+ Set the voltage (mV) to program the axp pmic dldo3 at, set to 0 to
+ disable dldo3.
+
+config AXP_DLDO4_VOLT
+ int "axp pmic dldo4 voltage"
+ depends on AXP221_POWER || AXP818_POWER
+ default 0
+ ---help---
+ Set the voltage (mV) to program the axp pmic dldo4 at, set to 0 to
+ disable dldo4.
+
+config AXP_ELDO1_VOLT
+ int "axp pmic eldo1 voltage"
+ depends on AXP221_POWER || AXP809_POWER || AXP818_POWER
+ default 0
+ ---help---
+ Set the voltage (mV) to program the axp pmic eldo1 at, set to 0 to
+ disable eldo1.
+
+config AXP_ELDO2_VOLT
+ int "axp pmic eldo2 voltage"
+ depends on AXP221_POWER || AXP809_POWER || AXP818_POWER
+ default 0
+ ---help---
+ Set the voltage (mV) to program the axp pmic eldo2 at, set to 0 to
+ disable eldo2.
+
+config AXP_ELDO3_VOLT
+ int "axp pmic eldo3 voltage"
+ depends on AXP221_POWER || AXP809_POWER || AXP818_POWER
+ default 3000 if MACH_SUN9I
+ default 0
+ ---help---
+ Set the voltage (mV) to program the axp pmic eldo3 at, set to 0 to
+ disable eldo3. On some A31(s) tablets it might be used to supply
+ 1.2V for the SSD2828 chip (converter of parallel LCD interface
+ into MIPI DSI).
+ On A80 boards it powers the PM pingroup and should be 3.0V.
+
+config AXP_FLDO1_VOLT
+ int "axp pmic fldo1 voltage"
+ depends on AXP818_POWER
+ default 0 if MACH_SUN8I_A83T
+ ---help---
+ Set the voltage (mV) to program the axp pmic fldo1 at, set to 0 to
+ disable fldo1.
+ On A83T / H8 boards fldo1 is VCC-HSIC and should be 1.2V if HSIC is
+ used.
+
+config AXP_FLDO2_VOLT
+ int "axp pmic fldo2 voltage"
+ depends on AXP818_POWER
+ default 900 if MACH_SUN8I_A83T
+ ---help---
+ Set the voltage (mV) to program the axp pmic fldo2 at, set to 0 to
+ disable fldo2.
+ On A83T / H8 boards fldo2 is VCC-CPUS and should be 0.9V.
+
+config AXP_FLDO3_VOLT
+ int "axp pmic fldo3 voltage"
+ depends on AXP818_POWER
+ default 0
+ ---help---
+ Set the voltage (mV) to program the axp pmic fldo3 at, set to 0 to
+ disable fldo3.
+
+config AXP_SW_ON
+ bool "axp pmic sw on"
+ depends on AXP809_POWER || AXP818_POWER
+ ---help---
+ Enable to turn on axp pmic sw.
+
+config SY8106A_VOUT1_VOLT
+ int "SY8106A pmic VOUT1 voltage"
+ depends on SY8106A_POWER
+ default 1200
+ ---help---
+ Set the voltage (mV) to program the SY8106A pmic VOUT1. This
+ is typically used to power the VDD-CPU and should be 1200mV.
+ Values can range from 680mV till 1950mV.
+
+config TWL4030_POWER
+ depends on OMAP34XX
+ bool "Enable driver for TI TWL4030 power management chip"
+ imply CMD_POWEROFF
+ ---help---
+ The TWL4030 in a combination audio CODEC/power management with
+ GPIO and it is commonly used with the OMAP3 family of processors
+
+config POWER_MT6323
+ bool "Poweroff driver for mediatek mt6323"
+ select CMD_POWEROFF
+ help
+ This adds poweroff driver for mt6323
+ this pmic is used on mt7623 / Bananapi R2
+
+config PALMAS_POWER
+ bool "Palmas power support"
+ depends on OMAP54XX
+
+config POWER_I2C
+ bool "I2C-based power control for legacy power"
+ depends on POWER_LEGACY
+ help
+ Enable this to use the I2C driver designed for the legacy PMIC
+ interface.
+
+ Not to be used for new designs and existing ones should be moved to
+ the new PMIC interface based on driver model.
+
+config SPL_POWER_I2C
+ bool "I2C-based power control for legacy power"
+ depends on SPL_POWER_LEGACY
+ default y if POWER_I2C
+ help
+ Enable this to use the I2C driver designed for the legacy PMIC
+ interface.
+
+ Not to be used for new designs and existing ones should be moved to
+ the new PMIC interface based on driver model.
+
+endif
Index: patches/README
===================================================================
--- patches/README (nonexistent)
+++ patches/README (revision 146)
@@ -0,0 +1,6 @@
+
+/* begin *
+
+ TODO: Leave some comment here.
+
+ * end */
Index: patches
===================================================================
--- patches (nonexistent)
+++ patches (revision 146)
Property changes on: patches
___________________________________________________________________
Added: svn:ignore
## -0,0 +1,74 ##
+
+# install dir
+dist
+
+# Target build dirs
+.a1x-newlib
+.a2x-newlib
+.at91sam7s-newlib
+
+.build-machine
+
+.a1x-glibc
+.a2x-glibc
+.h3-glibc
+.h5-glibc
+.i586-glibc
+.i686-glibc
+.imx6-glibc
+.jz47xx-glibc
+.makefile
+.am335x-glibc
+.omap543x-glibc
+.p5600-glibc
+.power8-glibc
+.power8le-glibc
+.power9-glibc
+.power9le-glibc
+.m1000-glibc
+.riscv64-glibc
+.rk328x-glibc
+.rk33xx-glibc
+.rk339x-glibc
+.rk358x-glibc
+.s8xx-glibc
+.s9xx-glibc
+.x86_64-glibc
+
+# Hidden files (each file)
+.makefile
+.dist
+.rootfs
+
+# src & hw requires
+.src_requires
+.src_requires_depend
+.requires
+.requires_depend
+
+# Tarballs
+*.gz
+*.bz2
+*.lz
+*.xz
+*.tgz
+*.txz
+
+# Signatures
+*.asc
+*.sig
+*.sign
+*.sha1sum
+
+# Patches
+*.patch
+
+# Descriptions
+*.dsc
+*.txt
+
+# Default linux config files
+*.defconfig
+
+# backup copies
+*~
Radix cross Linux
The main Radix cross Linux repository contains the build scripts of packages, which have the most complete and common functionality for desktop machines
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